Nonvolatile Memory Module with DRAM Cache and Data Buffers
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Solution Overview
Problem
Existing nonvolatile memory technologies face challenges in maintaining data integrity and low power consumption while ensuring compatibility with volatile RAM systems.
Innovation Solution
A nonvolatile memory module is designed with a combination of nonvolatile memory, DRAM as a cache, data buffers, and a memory module control device to manage operations, using a DDR interface for communication with the processor, and employing a dual-port DRAM for efficient cache operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If nonvolatile memory is used as main memory to increase capacity and persistence, then data integrity and storage capacity are improved, but access speed and compatibility with volatile RAM systems deteriorate
Solution Approach 1:
The memory system is segmented into multiple tiers: volatile DRAM cache layer for fast access, nonvolatile memory layer for persistent storage, and buffer layer for data exchange. This segmentation allows each layer to operate at its optimal speed while collectively providing both fast access and data integrity.
Solution Approach 2:
A buffer device is introduced as an intermediary between the volatile DRAM cache and nonvolatile memory, facilitating efficient data exchange and managing the interface between different memory types. This intermediary resolves the compatibility and speed mismatch between volatile and nonvolatile memory systems.
2Speed
If DRAM is used as cache to improve access speed, then access speed is improved, but power consumption increases
Solution Approach 1:
The system employs periodic refresh operations for the DRAM cache rather than continuous power consumption. The cache is refreshed only when needed, and data can be persisted to nonvolatile memory when power conservation is prioritized, reducing overall power consumption while maintaining access speed benefits.
Solution Approach 2:
The system dynamically changes operational parameters by switching between volatile cache mode (high speed, higher power) and nonvolatile storage mode (lower power, slightly reduced speed). This allows optimization of power consumption based on workload requirements while maintaining access speed when necessary.
3Adaptability or versatility
If nonvolatile memory is integrated into existing memory slots to maintain compatibility, then compatibility is improved, but system complexity increases
Solution Approach 1:
The memory module is designed with multi-functionality to operate in different modes: it can function as traditional volatile RAM for maximum compatibility, or as a hybrid nonvolatile memory system with cache. The buffer device and controller manage multiple operational modes, allowing the same hardware to serve different purposes without increasing external system complexity.
Solution Approach 2:
The system employs a nested architecture where volatile DRAM cache is nested within the nonvolatile memory module, and the buffer device is nested between them. This nested structure allows the system to maintain a standard external interface for compatibility while hiding the complex multi-layered internal structure from the host system.
Data Source
AI summary
A nonvolatile memory module includes at least one nonvolatile memory, at least one nonvolatile memory controller configured to control the nonvolatile memory, at least one dynamic random access memory (DRAM) used as a cache of the at least one nonvolatile memory, data buffers configured to store data exchanged between the at least one DRAM and an external device, and a memory module control device configured to control the nonvolatile memory controller, the at least one DRAM, and the data buffers. The at least one DRAM stores a tag corresponding to cache data and compares the stored tag with input tag information to determine whether to output the cache data.