Nonvolatile Memory Integration on DRAM Channels

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Solution Overview

Problem

Current memory systems face inefficiencies in resource allocation and communication bandwidth, particularly in integrating nonvolatile memory with main memory modules, leading to suboptimal performance and cost issues due to underutilization of resources.

Innovation Solution

A system with a central processing unit and a dual-inline memory module that uses parallel data channels to integrate nonvolatile flash memory with dynamic random access memory, employing integrated circuits to translate between different addressing schemes and execute block I/O storage commands, enabling efficient data transfer and storage between the two memory types.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If nonvolatile memory is integrated on main memory modules, then storage capacity is improved, but addressing complexity increases due to different addressing schemes

Engineering Contradiction:
Improvestorage capacityVSAvoidaddressing complexity
Core Design Contradiction:
Quantity of substanceVSDevice complexity

Solution Approach 1:

The patent employs an intermediary translation layer that converts between the first addressing scheme (used by DRAM) and the second addressing scheme (used by nonvolatile flash memory). This intermediary component resolves the addressing complexity by automatically handling the scheme conversion, allowing the system to benefit from both memory types without requiring complex manual addressing management.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Power

If separate graphics cards are used, then processing capability is improved, but communication bandwidth utilization deteriorates

Engineering Contradiction:
Improveprocessing capabilityVSAvoidcommunication bandwidth utilization
Core Design Contradiction:
PowerVSLoss of energy

Solution Approach 1:

The patent merges the graphics processing functionality with the main memory module by integrating a computing engine directly into the memory module. This consolidation eliminates the need for separate graphics cards connected via expansion buses, thereby improving communication bandwidth utilization while maintaining enhanced processing capability. The graphics processes can now communicate directly through the memory interface without overwhelming a dedicated expansion bus.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentEP2911065B1Distributed procedure execution and file systems on a memory interface
Publication Date: 2017.12.27 RAMBUS INC
  • EP2911065B1 patent drawingFigure 1
  • EP2911065B1 patent drawingFigure 2
  • EP2911065B1 patent drawingFigure 3

AI summary

Nonvolatile memory (e.g., flash memory, solid-state disk) is included on memory modules that are on a DRAM memory channel. Nonvolatile memory residing on a DRAM memory channel may be integrated into the existing file system structures of operating systems. The nonvolatile memory residing on a DRAM memory channel may be presented as part or all of a distributed file system. Requests and/or remote procedure call (RPC) requests, or information associated with requests and/or RPCs, may be routed to the memory modules over the DRAM memory channel in order to service compute and/or distributed file system commands.