Nonvolatile Memory Dummy Bit Line Voltage Stabilization
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Solution Overview
Problem
Existing nonvolatile memory devices face challenges in reducing program errors while increasing program speed, particularly due to sharp changes in source line voltage during column address switch times, which can lead to incorrect programming of unselected memory cells.
Innovation Solution
Incorporating a dummy memory area that forms current paths during column address switch times to maintain a stable source line voltage, preventing sharp increases and thus reducing program errors, and ensuring continuous voltage supply to the memory cell array for improved programming speed.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If the column address switch time is reduced to increase program speed, then program speed is improved, but source line voltage becomes unstable causing program errors
Solution Approach 1:
A dummy bit line is introduced as an intermediary element during column address switch time. This dummy bit line serves as a temporary current path that prevents source line voltage from dropping when the actual bit line is not yet selected, thereby maintaining voltage stability and preventing program errors while enabling faster address switching.
2Reliability
If the column address switch time is extended to stabilize source line voltage, then program accuracy is improved, but program speed decreases
Solution Approach 1:
The dummy bit line is activated periodically during column address switch time, creating a temporary current path only when needed. This periodic activation stabilizes the source line voltage during critical transition periods without affecting the overall program speed, as the dummy bit line is quickly deactivated once the actual bit line selection is complete.
3Stability of the object's composition
If a dummy memory area is added to provide current paths during address switching, then source line voltage stability is improved, but device complexity increases
Solution Approach 1:
The dummy memory area is implemented locally within the memory array structure, using the same basic memory cell design as the main array. This localized approach provides the necessary current path functionality without requiring a completely different structure, thereby minimizing the increase in device complexity while achieving voltage stability.
Data Source
AI summary
A nonvolatile memory device includes a memory cell array including a main memory area and a dummy memory area, a row decoder, a bit line selection circuit, a data input/output circuit, a control circuit, and a voltage generator. The bit line selection circuit is configured to select a first main bit line during a program time and is configured to select a dummy bit line during a column address switch time. During the column address switch time, a second main bit line is selected. The voltage generator is configured to output, to the row decoder, a source line voltage to be applied to a selected source line during the program time and during the column address switch time, wherein the source line voltage is maintained at a voltage level during the program time and during the column address switch time.