Nonvolatile Memory Device Dummy Word Line Spacing

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Solution Overview

Problem

Nonvolatile memory devices face challenges in minimizing program disturbance phenomena due to strong electric fields, which can lead to unintended programming of memory cells, and in maintaining optimal cell current during programming operations.

Innovation Solution

The implementation of a nonvolatile memory device design that includes specific arrangements of word lines, dummy word lines, and select lines on a semiconductor substrate, with controlled distances and conductivity types, along with a data storage layer with charge trap sites, to reduce horizontal electric fields and induce source/drain regions using fringe fields.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If word lines and select lines are arranged in a conventional configuration, then device complexity is reduced, but program disturbance phenomena occur due to strong electric fields causing unintended programming of memory cells

Engineering Contradiction:
Improveprogram disturbance minimizationVSAvoidgate pattern arrangement
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The gate pattern is segmented into multiple distinct components: ground select lines, string select lines, dummy word lines, and actual word lines. This segmentation allows each component to serve a specific function in controlling electric field distribution, thereby reducing program disturbance while maintaining overall device organization.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Dummy word lines are introduced as intermediary elements between the select lines and the actual word lines. These dummy lines act as mediators that help control and distribute the electric field more evenly, preventing direct strong field interactions between select lines and memory cells that would cause program disturbance.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Productivity

If distances between gate lines are reduced to increase integration density, then productivity is improved, but electric field distribution becomes uncontrolled leading to program disturbance

Engineering Contradiction:
Improveintegration densityVSAvoidprogram disturbance control
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

Different spacing distances are applied to different regions of the gate pattern structure. Specifically, the distance between ground select line and first dummy word line, and between first dummy word line and first word line, is set to a first distance. Similarly, spacing between string select line and second dummy word line, and between second dummy word line and second word line, is set to a first distance. This local quality variation optimizes electric field control while maintaining high integration density.

Inventive Principle:
Principle #3Local quality

3Reliability

If conventional gate patterns are used without dummy lines, then device complexity is minimized, but cell current is not optimally maintained during programming operations

Engineering Contradiction:
Improvecell current maintenanceVSAvoidgate line configuration
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

Dummy word lines are positioned in advance between the select lines and the actual word lines to pre-establish optimal electric field distribution pathways. This preliminary structural arrangement ensures that during programming operations, the cell current is naturally maintained at optimal levels without requiring additional control mechanisms.

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This design effectively minimizes program disturbance and secures cell current by controlling electric field distributions and inducing necessary regions, thereby enhancing the operational characteristics of nonvolatile memory devices.

Implementation Method 1

a source/drain region may be induced in the semiconductor substrate between the channel regions of the ground select line and the first dummy word line by a fringe field

Methodology Applied
Scientific EffectFringe field: Electric Field

Implementation Method 2

a data storage layer with charge trap sites

Methodology Applied
Scientific EffectCharge trapping: Electrical Accumulator

Data Source

PatentUS10483278B2Nonvolatile memory devices and methods forming the same
Publication Date: 2019.11.19 SAMSUNG ELECTRONICS CO LTD
  • US10483278B2 patent drawing
  • US10483278B2 patent drawing
  • US10483278B2 patent drawing

AI summary

Provided are nonvolatile memory devices and methods of forming the same. The nonvolatile memory device includes a plurality of word lines, a ground select line, string select line, and a dummy word line. Each of distances between the dummy word line and the ground select line and between the dummy word line and the word line is greater than a distance between a pair of the word lines adjacent to each other.