Non-volatile Memory Programming Method Erase State Elimination

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Solution Overview

Problem

Traditional non-volatile memory technologies require strong error correcting code (ECC) circuits to maintain data integrity, which degrade memory performance due to increased area consumption and decoding latency, especially after long data retention times and high program and erase cycles.

Innovation Solution

A programming method for non-volatile memory that eliminates the erase state through a coarse and fine programming procedure, reducing bit errors and thereby minimizing or eliminating the need for an ECC circuit by categorizing memory cells into 2^N-1 or 2^N program states and verify levels, where N is a positive integer.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a strong ECC circuit is used to correct errors in memory, then data integrity is ensured, but area consumption increases and decoding latency increases

Engineering Contradiction:
Improvedata integrityVSAvoidECC circuit area
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent extracts and removes the erase state from the memory cell threshold voltage distribution, retaining only program states. This eliminates the primary source of bit errors (transitions between erase and program states), thereby reducing the required ECC circuit strength and its associated area consumption while maintaining data integrity.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent changes the parameter of threshold voltage distribution by removing the erase state and using only program states for data storage. This parameter change reduces the error rate, allowing for a smaller ECC circuit that consumes less area while still ensuring data integrity.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If a strong ECC circuit is used to correct errors in memory, then data integrity is ensured, but decoding latency increases

Engineering Contradiction:
Improvedata integrityVSAvoiddecoding latency
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

By extracting and removing the erase state from the memory operation, the patent reduces the error rate that the ECC circuit must handle. This allows for a simplified ECC implementation with shorter decoding latency while maintaining data integrity through the reduced error probability.

Inventive Principle:
Principle #2Taking out (Extraction)

3Quantity of substance

If the number of bits in memory cells increases, then storage density increases, but a stronger ECC circuit is required

Engineering Contradiction:
Improvestorage densityVSAvoidECC circuit complexity
Core Design Contradiction:
Quantity of substanceVSDevice complexity

Solution Approach 1:

The patent removes the erase state from high-density memory cells, eliminating the primary error source. This allows high storage density to be achieved without proportionally increasing ECC circuit complexity, as the error rate is reduced through the state elimination approach.

Inventive Principle:
Principle #2Taking out (Extraction)

4Ease of manufacture

If traditional programming methods are used, then memory cells can be programmed, but bit errors occur between erase and program states

Engineering Contradiction:
Improveprogramming capabilityVSAvoidbit error rate
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The patent extracts and removes the problematic erase state from the programming process. By programming memory cells to only program states and eliminating the erase state, the method maintains programming capability while dramatically reducing bit errors that occur during transitions between erase and program states.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

Instead of the traditional approach of having both erase and program states, the patent inverts the model by using only program states for data storage. This inversion eliminates the erase-program transition errors while maintaining full programming capability through the use of multiple program states.

Inventive Principle:
Principle #13The other way round (Inversion)

Data Source

PatentUS12020747B2Non-volatile memory and programming method thereof
Publication Date: 2024.06.25 MACRONIX INTERNATIONAL CO LTD
  • US12020747B2 patent drawing
  • US12020747B2 patent drawing
  • US12020747B2 patent drawing

AI summary

A non-volatile memory and a programming method thereof are provided. The programming method of the non-volatile memory includes the following steps. A coarse programming procedure is performed for programing all of a plurality of memory cells at an erase state to 2{circumflex over ( )}N−1 or 2{circumflex over ( )}N program states. N is a positive integer. A fine programming procedure is performed for pushing all of memory cells into 2{circumflex over ( )}N−1 or 2{circumflex over ( )}N verify levels.