Nonvolatile Memory Error Detection Circuit for Metal Line Resistance
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
As semiconductor memory devices, particularly nonvolatile memory devices, undergo miniaturization and increased stacking of word lines, the length of metal lines between peripheral circuits and memory cells increases, leading to a higher risk of metal line resistance errors.
Innovation Solution
The implementation of an operating method for a nonvolatile memory device that includes an error detection circuit to detect errors in write data by checking for repeated patterns before programming, and transmitting error data to the storage controller if an error is detected, ensuring reliable data programming.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If the number of word lines is increased to increase memory capacity, then the capacity of nonvolatile memory devices is improved, but the length of metal lines between peripheral circuit and memory cell increases leading to higher risk of metal line resistance errors
Solution Approach 1:
The patent applies preliminary action by performing error detection on write data before it is programmed to the memory cell array. The error detection circuit checks for repeated patterns in the write data stored in the page buffer circuit, and if an error is detected, the data is not programmed to the memory cells. This preliminary detection and prevention mechanism addresses the reliability issue caused by increased metal line length while maintaining high memory capacity through increased word line stacking.
2Reliability
If error detection operation is performed on write data before programming, then the reliability of data programming is improved, but the complexity of the device increases due to additional error detection circuit
Solution Approach 1:
The patent applies local quality by implementing error detection only in specific critical locations where metal line resistance errors are most likely to occur. The error detection circuit is positioned to check write data in the page buffer circuit before it reaches the memory cell array, focusing detection resources on the most vulnerable data paths. This localized approach improves data programming reliability while minimizing the overall complexity increase of the device.
Data Source
AI summary
An operating method of a storage device including a nonvolatile memory device and a storage controller includes transmitting, by the storage controller, a set-feature command including error detection activation information to the nonvolatile memory device, transmitting, by the storage controller, a program command and write data to the nonvolatile memory device, performing, by the nonvolatile memory device, an error detection operation on the write data of a page buffer circuit before programming the write data to memory cells, in response to the program command, transmitting, by the nonvolatile memory device, the write data as error data to the storage controller when an error is detected in the write data, and programming, by the nonvolatile memory device, the write data to the memory cells when an error is not detected in the write data.