Non-Volatile Memory Programming with Fast Bit Detection and Verify Skip
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Solution Overview
Problem
Multi-state non-volatile storage systems face inefficiencies due to prolonged verification processes, which slow down the programming process as the number of allowed threshold voltage ranges increases, leading to longer verification times and reduced programming speed.
Innovation Solution
Implementing a method that differentiates between two sets of memory cells during programming, where cells reaching their target threshold voltage are locked out of further programming, and cells with a high number of 'fast bits' are identified to terminate the programming process early, thereby reducing unnecessary verification operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If verification is performed for each allowed threshold voltage range during programming, then programming accuracy is improved, but programming speed deteriorates
Solution Approach 1:
The patent applies partial verification by selectively verifying only certain threshold voltage ranges (e.g., higher states) while skipping verification for other ranges (e.g., lower states). This partial action approach maintains sufficient programming accuracy for critical states while eliminating redundant verification steps, thereby resolving the contradiction between verification accuracy and programming speed.
Solution Approach 2:
The patent implements verify skip by detecting fast bits and skipping the verification process for those specific threshold voltage ranges where memory cells have already reached or exceeded the target state. This skipping mechanism eliminates unnecessary verification operations while ensuring that cells requiring verification are still properly checked, thus improving programming speed without sacrificing essential accuracy.
2Quantity of substance
If the number of allowed threshold voltage ranges increases, then storage capacity is improved, but verification time increases
Solution Approach 1:
With multiple threshold voltage ranges enabling higher storage capacity, the patent applies partial verification by selectively verifying only the necessary ranges rather than all ranges. This approach maintains the high storage capacity benefit while reducing verification time by focusing only on critical threshold ranges that require verification.
Solution Approach 2:
The patent enables faster programming across multiple threshold voltage ranges by detecting fast bits and skipping verification for ranges where cells have already reached target states. This skipping mechanism is particularly effective when programming to multiple states, as it eliminates redundant verification steps while maintaining data integrity.
3Reliability
If verification is performed for all memory cells, then reliability is improved, but programming efficiency deteriorates
Solution Approach 1:
The patent applies local quality by differentiating verification requirements for different memory cells based on their individual states. Fast bits that have already reached target threshold voltage ranges are identified and excluded from further verification, while cells that have not reached their targets continue to be verified. This localized approach maintains reliability for cells needing verification while improving overall programming efficiency.
Solution Approach 2:
The patent improves programming efficiency by skipping verification for memory cells that have already reached their target threshold voltage ranges. The fast bit detection mechanism identifies these cells and excludes them from subsequent verification steps, thereby maintaining reliability for cells that require verification while significantly reducing the total verification time and improving overall programming efficiency.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach accelerates the programming process by minimizing unnecessary verification steps, especially for memory cells already at target voltage or with a high number of fast bits, thus improving overall programming efficiency and speed.
Implementation Method 1
Electrons from the channel are injected into the floating gate. When electrons accumulate in the floating gate, the floating gate becomes negatively charged and the threshold voltage of the memory cell is raised
Data Source
AI summary
A set of non-volatile storage elements are subjected to a programming process in order to store data. During the programming process, one or more verification operations are performed to determine whether the non-volatile storage elements have reached their target. Non-volatile storage elements being programmed to a first set of one or more targets are verified to determine whether they have reached their target and are locked out of further programming if it is determined that they have reached their target. Non-volatile storage elements being programmed to the second set of one or more targets are tested to determine the number of fast programming bits. When the number of fast bits for a particular target is greater than a threshold, then programming stops for the non-volatile storage elements being programmed to the particular target.