Nonvolatile Memory Fixed Charge Layer Blocking Insulation
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Solution Overview
Problem
Nonvolatile memory devices face challenges in minimizing charge loss through block insulation layers and improving data storage capability and erase characteristics due to limitations in blocking insulation layer design.
Innovation Solution
The implementation of a nonvolatile memory device structure that includes a tunnel dielectric layer, a trap insulation layer, and a blocking insulation layer with a fixed charge layer, where the fixed charge layer has a higher charge density than the blocking insulation layer, and is separated from the gate electrode, generating opposing electric fields to reduce charge loss and enhance data storage and erase operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a conventional blocking insulation layer is used, then the device structure is simple, but charge loss occurs and data storage capability deteriorates
Solution Approach 1:
The blocking insulation layer is segmented into multiple distinct layers: a first blocking insulation layer adjacent to the gate electrode, a fixed charge layer with higher charge density, and a second blocking insulation layer adjacent to the tunnel dielectric layer. This segmentation allows each layer to perform its specific function, reducing charge loss while maintaining manageable structural complexity
Solution Approach 2:
The blocking insulation layer uses composite material structure with different dielectric materials having different charge densities. The fixed charge layer contains fixed charges with higher charge density than the surrounding blocking insulation layers, creating a composite structure that optimizes both electrical performance and structural organization
2Reliability
If the fixed charge layer is placed adjacent to the gate electrode, then the electric field control is improved, but electron back tunneling increases
Solution Approach 1:
The first blocking insulation layer acts as an intermediary layer positioned between the gate electrode and the fixed charge layer. This intermediary structure allows the fixed charge layer to generate the necessary electric field for erase operations while preventing direct electron back tunneling from the gate electrode to the fixed charge layer, thus reducing harmful electron migration
3Quantity of substance
If the charge density of the fixed charge layer is increased, then the data storage capability is improved, but the charge loss through the blocking insulation layer increases
Solution Approach 1:
The fixed charge layer is positioned at a specific location within the blocking insulation structure, separated from both the gate electrode and the tunnel dielectric layer by respective blocking insulation layers. This local quality arrangement allows the high charge density region to be confined to where it is most effective for data storage while the surrounding lower charge density blocking insulation layers prevent charge loss pathways
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration minimizes charge loss and improves data storage capability and erase characteristics by generating opposing electric fields, thereby enhancing the reliability and performance of nonvolatile memory devices.
Implementation Method 1
a first electric field is generated between the gate electrode and the fixed charge layer by an erase voltage applied between the gate electrode and a channel region in an erase operation, a second electric field is generated between the first blocking insulation layer and the fixed charge layer by the fixed charge layer and the first blocking insulation layer, and the second electric field and the first electric field are opposite in direction
Data Source
AI summary
A nonvolatile memory device and method of manufacturing the same are provided. In the nonvolatile memory device, a blocking insulation layer is provided between a trap insulation layer and a gate electrode. A fixed charge layer spaced apart from the gate electrode is provided in the blocking insulation layer. Accordingly, the reliability of the nonvolatile memory device is improved.