Non-volatile Memory Gate Oxidation Control
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Solution Overview
Problem
The challenge in semiconductor manufacturing is to create non-volatile memory devices that operate at higher frequencies with improved reliability while maintaining high integration density, which is hindered by the shrinking critical dimensions and increased complexity of pattern formation.
Innovation Solution
The solution involves a non-volatile memory device design with a control gate electrode, a charge storage region, and an oxidation-resistant spacer, where the control metal gate is narrower than the control gate mask pattern, and an oxidation-resistant spacer is positioned between the control gate mask pattern and the control base gate, along with barrier layers and specific materials like nitride for enhanced performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If the critical dimension is reduced to increase integration density, then the integration density is improved, but the manufacturing precision and reliability deteriorate
Solution Approach 1:
The control gate electrode is segmented into multiple layers: a control base gate layer and a control metal gate layer. This segmentation allows independent optimization of each layer's function and dimensions, enabling precise control over the final gate structure while maintaining high integration density
Solution Approach 2:
Different materials are used for different parts of the gate structure: the control base gate is made of polysilicon while the control metal gate is made of metal material. This local quality differentiation optimizes each region's electrical characteristics and manufacturing properties, improving overall device performance and reliability
2Manufacturing precision
If the control metal gate width is reduced to maintain narrow linewidths, then the linewidth control is improved, but the oxidation resistance deteriorates
Solution Approach 1:
An oxidation-resistant spacer is introduced as an intermediary protective layer between the control metal gate and the oxidation environment. This spacer prevents direct oxidation of the narrow control metal gate while maintaining its dimensional integrity
Solution Approach 2:
The oxidation-resistant spacer is formed beforehand to protect the control metal gate from oxidation during subsequent processing steps. This preliminary protective action ensures the narrow linewidth is maintained without oxidation-related degradation
3Ease of manufacture
If the gate structure is simplified to reduce device complexity, then the manufacturing ease is improved, but the performance and reliability deteriorate
Solution Approach 1:
The control base gate and control metal gate are merged into a unified control gate electrode structure through sequential layer formation and patterning. This combining approach maintains manufacturing simplicity while achieving enhanced electrical performance and reliability through the composite structure
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design minimizes oxidation, maintains narrow linewidths, and optimizes integration density, resulting in a reliable and high-speed non-volatile memory device with improved data retention characteristics.
Implementation Method 1
an oxidation-resistant spacer at sidewalls of the control metal gate positioned between the control gate mask pattern and the control base gate
Data Source
AI summary
A non-volatile memory device comprises a substrate, a control gate electrode on the substrate, and a charge storage region between the control gate electrode and the substrate. A control gate mask pattern is on the control gate electrode, the control gate electrode comprising a control base gate and a control metal gate on the control base gate. A width of the control metal gate is less than a width of the control gate mask pattern. An oxidation-resistant spacer is at sidewalls of the control metal gate positioned between the control gate mask pattern and the control base gate.