Nonvolatile Memory Gate Structure Tungsten Nitride Interface

Resolve Bottlenecks,
Find Innovative SolutionsGenerate Solutions

Solution Overview

Problem

The reduction in line-widths of conductive patterns in semiconductor devices increases electrical resistance and RC delay, and the use of tungsten for gate patterns leads to reliability issues with the gate insulating layer due to interfacial reactions and mutual diffusion, which can result in increased contact resistance and operational problems.

Innovation Solution

A nonvolatile memory device structure is developed with a semiconductor substrate having a cell region and a peripheral circuit region, featuring a charge storage insulating layer, a gate electrode, and a conductive layer, where the peripheral circuit gate includes a gate insulating layer, a semiconductor layer, an ohmic layer, and a conductive layer, and the cell gate includes a charge storage insulating layer, a gate electrode, and a conductive layer, with a tungsten nitride layer and a tungsten layer to reduce interface resistance and prevent degradation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If tungsten layer is directly in contact with gate insulating layer, then specific resistance is reduced, but reliability of gate insulating layer is degraded due to interfacial reaction and mutual diffusion

Engineering Contradiction:

Improvereliability of gate insulating layerVSAvoidinterfacial reaction and mutual diffusion

Core Design Contradiction:

ReliabilityVSObject-affected harmful factors

Solution Approach 1:

A semiconductor layer (polysilicon) is introduced as an intermediary between the tungsten layer and the gate insulating layer. This intermediate layer prevents direct contact between tungsten and the gate insulating layer, thereby eliminating interfacial reactions and mutual diffusion while maintaining the low resistance benefits of tungsten.

Inventive Principle:

Principle #24Intermediary (Mediator)

Solution Approach 2:

The gate structure is segmented into multiple distinct layers: gate insulating layer, semiconductor layer (polysilicon), and tungsten layer. This segmentation allows each layer to perform its specific function independently, with the semiconductor layer acting as a protective buffer between the metal and insulator.

Inventive Principle:

Principle #1Segmentation

2Object-affected harmful factors

If barrier metal layer is disposed between tungsten layer and semiconductor layer, then interfacial reaction is reduced, but contact resistance is increased

Engineering Contradiction:

Improveinterfacial reactionVSAvoidcontact resistance

Core Design Contradiction:

Object-affected harmful factorsVSReliability

Solution Approach 1:

The invention changes the material parameter of the intermediate layer from metal nitride (high resistance) to semiconductor material polysilicon (lower resistance). This parameter change maintains the protective function against interfacial reaction while significantly reducing contact resistance compared to traditional metal nitride barrier layers.

Inventive Principle:

Principle #35Parameter changes

Data Source

PatentUS7547942B2Nonvolatile memory devices and methods of fabricating the same

Publication Date: 2009.06.16 SAMSUNG ELECTRONICS CO LTD

AI summary

A nonvolatile memory device includes a semiconductor substrate including a cell region and a peripheral circuit region, a cell gate on the cell region, and a peripheral circuit gate on the peripheral circuit region, wherein the cell gate includes a charge storage insulating layer on the semiconductor substrate, a gate electrode on the charge storage insulating layer, and a conductive layer on the gate electrode, and the peripheral circuit gate includes a gate insulating layer on the semiconductor substrate, a semiconductor layer on the gate insulating layer, an ohmic layer on the semiconductor layer, and the conductive layer on the ohmic layer.