Non-volatile Memory Device With Intermediate Wiring
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Solution Overview
Problem
Current non-volatile memory devices face challenges in efficiently integrating three-dimensional semiconductor memory structures with vertically stacked memory cells and metal wirings, particularly in connecting channel hole structures and bit lines effectively while navigating limitations in lithography resolution and patterning technologies.
Innovation Solution
The proposed non-volatile memory device employs a two-dimensional pattern of channel hole structures with bit lines and intermediate wirings, where bit lines are directly connected to channel hole structures through contacts, and intermediate wirings connect channel hole structures in a zigzag pattern, allowing for efficient electrical connections and addressing limitations in lithography resolution by using alternate contact placement.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If vertically stacked memory cells and metal wirings are integrated to improve three-dimensional semiconductor memory integration, then memory integration is improved, but device complexity increases
Solution Approach 1:
The bit line connection structure is segmented into multiple components: first contacts directly connected to channel hole structures, intermediate contacts arranged in matrix form, and intermediate wirings connecting these contacts. This segmentation allows complex three-dimensional connections to be broken down into manageable layers, improving integration while controlling complexity through systematic organization.
Solution Approach 2:
The patent transitions from two-dimensional planar connections to three-dimensional vertical stacking by arranging channel hole structures, contacts, and wirings in multiple vertical layers. The intermediate contacts are positioned at different heights and connected through intermediate wirings, creating vertical connectivity that enhances memory integration density.
2Reliability
If lithography resolution and patterning technologies are used to connect channel hole structures and bit lines, then connectivity is improved, but manufacturing precision requirements increase
Solution Approach 1:
Intermediate contacts serve as intermediary elements between the channel hole structures and the bit lines. These intermediate contacts are connected via intermediate wirings that extend in the first direction, providing a mediating connection layer that simplifies the direct connection requirements between channel holes and bit lines, thereby reducing patterning precision demands.
Solution Approach 2:
The direct connection function between channel hole structures and bit lines is extracted and separated into distinct components: first contacts for direct connection, and intermediate contacts with intermediate wirings for indirect connections. This extraction allows different connection types to be optimized independently, reducing the overall manufacturing precision requirements.
Data Source
AI summary
A non-volatile memory device includes channel hole structures, bit lines, and intermediate wiring. The channel hole structures are arranged in a two-dimensional pattern on and extend vertically from a substrate. The bit lines extend in a first direction, are spaced apart from each other in a second direction crossing the first direction, and are electrically connected to the plurality of channel hole structures. The intermediate wiring which connects channel hole structures and the bit lines. The bit lines includes a first bit line and a second bit line directly connected to the channel hole structures through a first contact and spaced apart in the second direction. The intermediate wiring is between the first bit line and the second bit line.