Nonvolatile Memory Programming via ISPP Voltage Control
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Solution Overview
Problem
Nonvolatile memory devices face a tradeoff between storage capacity and performance, with increasing power consumption as storage capacity and performance increase, necessitating a reduction in power consumption to address temperature regulation, energy costs, and limited battery life.
Innovation Solution
The method involves incremental step pulse programming (ISPP) in nonvolatile memory devices, where a first and second program pulse are sequentially applied to wordlines connected to memory cells, with a program permission voltage applied to one bitline and an inhibit voltage to another, allowing for efficient programming across multiple program states while minimizing power usage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If incremental step pulse programming with multiple program pulses is applied to program memory cells to higher program states, then storage capacity and performance are improved, but power consumption increases
Solution Approach 1:
The programming process is segmented into multiple program pulses (first program pulse, second program pulse, etc.) applied in sequence across multiple program loops. Each pulse corresponds to a specific program state transition, allowing progressive programming to higher capacity states while controlling energy consumption through structured pulse application.
Solution Approach 2:
The programming method dynamically adjusts the programming process by incrementing program pulses in each loop and selectively applying pulses based on the current program state. The controller adapts the number and timing of pulses required to reach target program states, optimizing the balance between achieving high storage capacity and minimizing power consumption.
2Productivity
If multiple program pulses are sequentially applied to program memory cells to higher program states, then storage capacity and performance are improved, but programming time increases
Solution Approach 1:
The programming operation is divided into multiple program loops, each containing sequential program pulses. This segmentation allows the controller to systematically progress through program states in organized increments, managing the time required to reach higher capacity states through structured progression rather than uncontrolled sequential pulsing.
Solution Approach 2:
The programming process maintains continuous useful action by continuously applying program pulses across multiple loops without idle periods. Each loop builds upon the previous one with incremented pulses, ensuring that the programming action is uninterrupted and efficient, minimizing total programming time while achieving high storage capacity.
3Quantity of substance
If higher program states are targeted to increase storage capacity, then storage capacity is improved, but power consumption increases
Solution Approach 1:
The method changes programming parameters by incrementing the number of program pulses and adjusting pulse timing in each program loop. As memory cells progress to higher program states (corresponding to higher storage capacity), the controller modifies pulse parameters to efficiently achieve each state transition, optimizing the energy required to reach higher capacity levels.
Data Source
AI summary
A nonvolatile memory device is programmed by performing a plurality of program loops each comprising sequentially applying first through n-th program pulses (n>1) to a selected wordline connected to a page of memory cells to be programmed, and incrementing each of the first through n-th program pulses prior to a next program loop, wherein the first through n-th program pulses are used to program selected memory cells to respective first through n-th program states, and during application of an i-th program pulse among the first through n-th program pulses (1<i<n), applying a program inhibit voltage to bitlines connected to selected memory cells to be programmed to the first through (i−1)-th program states and applying a program permission voltage to bitlines connected to selected memory cells to be programmed to the i-th through n-th program states.