Byte-Addressable Non-Volatile Memory Partitioning for System Complexity Reduction
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Solution Overview
Problem
Computer systems with separate technologies for main memory and secondary storage face costs, complexity, and longer boot-up times due to the need for volatile main memory and non-volatile secondary storage, which are not directly accessible by the processor.
Innovation Solution
Implementing byte-addressable non-volatile memory technologies like RRAM, Memristors, or MRAM as persistent main memory, allowing direct processor access and eliminating the need for separate secondary storage by storing operating systems and data in these memories, which retain content across power cycles.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Duration of action of stationary object
If separate technologies are used for main memory and secondary storage, then data retention without power is improved, but device complexity increases
Solution Approach 1:
The patent merges the functions of main memory and secondary storage into a single non-volatile memory system. The byte-addressable non-volatile memory simultaneously provides main memory functionality (direct processor access, byte-level addressing) and secondary storage functionality (persistent data retention), eliminating the need for separate volatile memory and secondary storage devices.
Solution Approach 2:
The non-volatile memory system performs multiple functions: it serves as both main memory (providing fast, direct processor access with byte-addressability) and secondary storage (providing persistent data retention). This multi-functional approach replaces the traditional multi-component memory hierarchy with a unified system.
2Duration of action of stationary object
If separate technologies are used for main memory and secondary storage, then data retention without power is improved, but manufacturing cost increases
Solution Approach 1:
By combining main memory and secondary storage into a single non-volatile memory system, the patent eliminates the need to manufacture and integrate multiple separate components (volatile memory chips, secondary storage devices, controllers). This consolidation reduces manufacturing complexity and cost while maintaining data retention capabilities.
3Speed
If volatile memory is used for main memory, then access speed is improved, but data retention without power deteriorates
Solution Approach 1:
The patent changes the fundamental parameter of memory volatility by using non-volatile memory technology that provides both fast access speeds (comparable to volatile memory) and persistent data retention. The byte-addressable non-volatile memory achieves this through advanced memory cell designs that maintain data without power while enabling rapid read/write operations.
4Duration of action of stationary object
If secondary storage is used for storing operating systems and data, then data retention is improved, but access speed deteriorates
Solution Approach 1:
The patent eliminates the speed bottleneck by merging secondary storage with main memory into a unified byte-addressable non-volatile memory system. The processor can directly access the operating system and data stored in this memory at full speed without the intermediate copying step required in traditional systems, achieving both fast access and persistent storage.
5Reliability
If separate technologies are used for main memory and secondary storage, then reliability is improved through redundancy, but device complexity increases
Solution Approach 1:
The patent consolidates multiple memory components into a single integrated non-volatile memory system, reducing the number of components that can fail and the complexity of managing multiple memory types. The unified system with its metadata region provides inherent reliability through built-in data structure validation and error handling mechanisms.
Data Source
AI summary
In one example, a computer having a processor and a byte-addressable non-volatile read-write main memory. The memory is partitioned into plural regions, each region having at least one defined operational property. At least one of the regions is a metadata region to store plural data sets. Each data set specifies a location in memory, and the at least one operational property, of a corresponding one of the regions.


