Nonvolatile Memory Module with Command Snooping for Power Failure Backup
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Solution Overview
Problem
As the number of memory devices coupled to a single controller increases, the number of required signal lines also increases, complicating system design and increasing fabrication costs, while existing technologies struggle to efficiently manage independent access and data backup in volatile memory systems.
Innovation Solution
A nonvolatile dual in-line memory module that allows independent access to volatile memory devices with a reduced number of signal lines by using a controller with command/address snooping logic to analyze data and set different command address latencies for each device, enabling data backup and restoration during power failures.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If the number of memory devices coupled to a single controller increases, then the memory capacity and functionality are improved, but the number of required signal lines increases, complicating system design and increasing fabrication costs
Solution Approach 1:
The patent merges multiple control buses into a single shared control bus that serves multiple volatile memory devices. The controller uses command/address snooping logic to monitor and analyze commands intended for different memory devices, enabling it to route control signals appropriately over the shared bus. This consolidation reduces the number of separate control buses needed, directly addressing the technical contradiction by maintaining the ability to control multiple devices while reducing signal line complexity.
Solution Approach 2:
The shared control bus is designed to be universal, serving multiple volatile memory devices simultaneously. The controller's command/address control logic can selectively direct control signals to different memory devices based on snooped command analysis, making the single control bus capable of performing the functions of multiple separate control buses. This multi-functionality allows the system to support multiple memory devices without proportionally increasing control signal lines.
2Ease of operation
If separate control buses are provided for each memory device, then independent control capability is improved, but the number of signal lines increases, increasing fabrication cost
Solution Approach 1:
The patent combines multiple separate control buses into a single shared control bus, reducing fabrication cost. The controller maintains independent control capability through command/address snooping logic that monitors commands and a control logic that selectively routes control signals to appropriate memory devices. This merging approach eliminates the need for multiple separate control buses while preserving independent control functionality.
Solution Approach 2:
The controller acts as an intermediary between the host and multiple volatile memory devices sharing a common control bus. The command/address snooping logic intercepts and analyzes commands, while the command/address control logic mediates signal routing to the appropriate memory device. This intermediary role allows the controller to maintain independent control capability over each memory device despite them sharing a single control bus, thereby reducing fabrication cost without sacrificing control independence.
3Device complexity
If multiple memory devices share a common control bus and data bus, then the number of signal lines is reduced, but the ability to independently access and manage data backup for each device becomes more difficult
Solution Approach 1:
The controller employs command/address snooping logic that continuously monitors and analyzes commands issued to memory devices on the shared control bus. This feedback mechanism allows the controller to identify which memory device a command is intended for, enabling it to maintain independent access capability despite the shared bus architecture. The snooped command information provides feedback that guides the controller's selective signal routing to the appropriate device.
Solution Approach 2:
The controller's command/address control logic serves as an intermediary that selectively routes control signals to specific memory devices based on snooped command analysis. This intermediary function enables independent access to each memory device over the shared control bus by intelligently directing signals to the intended target device, thereby maintaining ease of operation while benefiting from signal line reduction.
4Reliability
If the controller backs up data from all volatile memory devices simultaneously, then data protection is improved, but the time required for backup operation increases
Solution Approach 1:
The patent segments the data backup process by enabling selective backup of specific memory devices based on snooped command analysis. The command/address snooping logic identifies which memory devices contain data that needs backup, and the command/address control logic directs backup operations only to those specific devices. This segmentation of the backup process allows the system to protect critical data while reducing the total backup time by avoiding unnecessary backup operations on all devices simultaneously.
Solution Approach 2:
The controller performs partial backup actions by selectively backing up data from only those memory devices that require protection, rather than backing up all devices uniformly. The command/address snooping logic identifies the necessary subset of devices for backup, and the system performs backup operations on this partial set. This partial action approach maintains adequate data protection for critical devices while significantly reducing the overall backup operation time.
Data Source
AI summary
A nonvolatile memory module includes volatile memory devices sharing a data bus and a control bus; at least one nonvolatile memory device; and a controller for backing up data stored in the volatile memory devices into the nonvolatile memory device at a power failure of a host, and restoring data backed up in the nonvolatile memory device to the volatile memory devices at recovery of the power failure, the controller including: a command/address snooping logic for snooping on a command and an address inputted from a memory controller of the host, and analyzing amounts of stored data in the respective volatile memory devices; and a command/address control logic for selecting one of the volatile memory devices in order of the amounts of stored data based on analysis results of the command/address snooping logic, and backing up data of the selected volatile memory device in the nonvolatile memory device.