Non-Volatile Memory Modules Power Optimization

Solution Overview

Problem

Dynamic random access memory (DRAM) integrated circuits consume more power and require frequent refresh cycles, while non-volatile memory integrated circuits offer lower power consumption but have slower write access times and different performance characteristics, posing challenges in system applications that aim to reduce power consumption and enhance memory performance.

Innovation Solution

Integrating a non-DRAM memory controller and non-volatile memory modules into computing systems, which modify data communication protocols and use feedback status control signals to efficiently manage access to non-volatile memory modules, reducing power consumption and improving performance by leveraging the strengths of both DRAM and non-volatile memory technologies.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If DRAM integrated circuits are used in main memory, then write access time is fast, but power consumption is high and refresh cycles are required

Engineering Contradiction:

Improvewrite access timeVSAvoidpower consumption

Core Design Contradiction:

SpeedVSUse of energy by moving object

Solution Approach 1:

The memory system is segmented into two distinct memory types: volatile DRAM for fast write operations and non-volatile memory for power-efficient storage. This segmentation allows each memory type to operate in its optimal performance regime, with DRAM handling frequent writes and non-volatile memory maintaining data without refresh cycles, thereby resolving the contradiction between fast write access and low power consumption

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The system changes the operational parameters of memory by introducing non-volatile memory with different electrical characteristics and retention properties. This parameter change enables the system to achieve both fast write access (through DRAM) and reduced power consumption (through non-volatile memory's ability to retain data without refresh), as the non-volatile memory does not require continuous power to maintain its state

Inventive Principle:

Principle #35Parameter changes

2Use of energy by moving object

If non-volatile memory integrated circuits are used, then power consumption is reduced and no refresh cycles are needed, but write access time increases

Engineering Contradiction:

Improvepower consumptionVSAvoidwrite access time

Core Design Contradiction:

Use of energy by moving objectVSSpeed

Solution Approach 1:

The memory system is segmented into two distinct memory types: volatile DRAM for fast write operations and non-volatile memory for power-efficient storage. This segmentation allows each memory type to operate in its optimal performance regime, with DRAM handling frequent writes and non-volatile memory maintaining data without refresh cycles, thereby resolving the contradiction between fast write access and low power consumption

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The system merges DRAM and non-volatile memory into a unified memory architecture, combining the fast write capability of DRAM with the power efficiency of non-volatile memory. This merging allows the system to leverage the strengths of both memory types, achieving both fast write access and reduced power consumption simultaneously

Inventive Principle:

Principle #5Merging (Combining)

3Duration of action of stationary object

If non-DRAM memory modules are integrated, then data is maintained without refresh cycles, but different performance characteristics require modified communication protocols

Engineering Contradiction:

Improvedata retention timeVSAvoidcommunication protocol complexity

Core Design Contradiction:

Duration of action of stationary objectVSDevice complexity

Solution Approach 1:

A memory controller serves as an intermediary between the processor and the non-DRAM memory modules. This intermediary translates standard memory access requests into appropriate protocols for the non-volatile memory, managing the complexity of different performance characteristics and data retention mechanisms while presenting a unified interface to the system, thereby resolving the contradiction between extended data retention and protocol complexity

Inventive Principle:

Principle #24Intermediary (Mediator)

Data Source

PatentUS9984012B2Read writeable randomly accessible non-volatile memory modules

Publication Date: 2018.05.29 WESTERN DIGITAL TECHNOLOGIES INC

AI summary

A read writeable random accessible non-volatile memory module includes a printed circuit board with an edge connector that can be plugged into a socket of a printed circuit board. The read writeable random accessible non-volatile memory modules further include a plurality of read writable non-volatile memory devices.