Non-volatile Memory Device Multilayer Chalcogenide Selection Element

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Solution Overview

Problem

Current non-volatile memory devices face challenges in enhancing reliability, particularly in the context of three-dimensional cross-point structures where the integration of chalcogenide materials in selection and memory layers is not optimized for efficient resistance change and endurance.

Innovation Solution

A non-volatile memory device design incorporating a selection element layer with multiple chalcogenide layers, including a first and second chalcogenide layer with different materials, and a memory layer with a third chalcogenide material, optimized for resistance change and phase change memory applications, enhancing reliability and performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a single-layer chalcogenide selection element is used, then the device structure is simple, but the reliability and resistance change control are insufficient

Engineering Contradiction:
Improvememory device reliabilityVSAvoidselection element structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The selection element is divided into multiple chalcogenide layers (first chalcogenide layer and second chalcogenide layer) with different materials, allowing each layer to contribute differently to the resistance change mechanism and improving overall reliability through distributed functionality

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent uses composite chalcogenide materials with different compositions in the selection element layers, combining materials with complementary properties to achieve better resistance change control and device reliability than single-material layers

Inventive Principle:
Principle #40Composite materials

2Reliability

If chalcogenide materials are used in selection and memory layers, then resistance change is achieved, but the optimization for efficient resistance change and endurance is insufficient

Engineering Contradiction:
ImproveenduranceVSAvoidmaterial optimization complexity
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

Different chalcogenide materials are assigned to different layers (selection element layers versus memory layer) based on their specific functional requirements, with each layer optimized locally for its particular role in resistance change and endurance

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent optimizes resistance change efficiency by carefully selecting and tuning the compositional parameters of the chalcogenide materials in each layer, adjusting material parameters to achieve desired electrical characteristics and improved endurance

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The proposed design improves the reliability and endurance of non-volatile memory devices by effectively controlling current flow and modifying resistance states, leading to enhanced memory performance in three-dimensional cross-point structures.

Implementation Method 1

a first chalcogenide layer and a second chalcogenide layer, the first chalcogenide layer including a first chalcogenide material, and the second chalcogenide layer including a second chalcogenide material; and a memory layer between the first electrode and the selection element layer, which includes a third chalcogenide material

Methodology Applied
Scientific EffectPhase change: Phase Change

Data Source

PatentUS10128312B2Non-volatile memory device
Publication Date: 2018.11.13 SAMSUNG ELECTRONICS CO LTD
  • US10128312B2 patent drawing
  • US10128312B2 patent drawing
  • US10128312B2 patent drawing

AI summary

There is provided a non-volatile memory device which can enhance the reliability of a memory device by using an ovonic threshold switch (OTS) selection element including a multilayer structure. The non-volatile memory device includes a first electrode and a second electrode spaced apart from each other, a selection element layer between the first electrode and the second electrode, which is closer to the second electrode rather than to the first electrode, and which includes a first chalcogenide layer, a second chalcogenide layer, and a material layer disposed between the first and second chalcogenide layers. The first chalcogenide layer including a first chalcogenide material, and the second chalcogenide layer including a second chalcogenide material. A memory layer between the first electrode and the selection element layer includes a third chalcogenide material which is different from the first and second chalcogenide materials.