Nonvolatile Semiconductor Memory for Neural Network Arithmetic

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Solution Overview

Problem

Current memory systems lack the capability to efficiently perform arithmetic operations for neural networks, which are essential for advanced AI applications.

Innovation Solution

A memory system comprising a memory controller and a nonvolatile semiconductor memory that sends a command set including arithmetic operation target data and an address to store weight data, allowing the semiconductor memory to perform arithmetic operations based on the target data and weight data.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If standard memory technology is used for neural network arithmetic operations, then device complexity is reduced, but computational speed and efficiency are insufficient

Engineering Contradiction:
Improvememory system structureVSAvoidarithmetic operation speed
Core Design Contradiction:
Device complexityVSProductivity

Solution Approach 1:

The memory device is designed to perform both traditional data storage functions and neural network arithmetic operations (multiplication and accumulation). The same memory cells, word lines, and bit lines are utilized for both storing weight data and performing computational operations, eliminating the need for separate dedicated computational hardware and thereby reducing overall system complexity while enabling AI functions.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Productivity

If dedicated AI processing hardware is implemented, then arithmetic operation speed improves, but device complexity and manufacturing difficulty increase

Engineering Contradiction:
Improvearithmetic operation speedVSAvoidmemory system structure
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The invention merges the storage function and computation function into a single integrated memory device. The memory cell array serves dual purposes: storing weight data and performing multiplication operations. The bit lines serve both as data output lines and as accumulation lines for summing products. This merging eliminates the need for complex separate AI processing units while achieving efficient neural network computations.

Inventive Principle:
Principle #5Merging (Combining)

3Measurement precision

If multiple read operations are performed for arithmetic operations, then calculation precision improves, but operation time increases

Engineering Contradiction:
Improvearithmetic operation precisionVSAvoidoperation time
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The accumulation operation is performed continuously during the read operation itself, rather than as a separate subsequent step. As data is read from the memory cells through the bit lines, the accumulation circuit simultaneously sums the products. This continuous operation eliminates idle time between reading and accumulating, maintaining computational precision while minimizing operation time.

Inventive Principle:
Principle #20Continuity of useful action

Data Source

PatentUS20250147702A1Nonvolatile semiconductor memory
Publication Date: 2025.05.08 KIOXIA CORP
  • US20250147702A1 patent drawing
  • US20250147702A1 patent drawing
  • US20250147702A1 patent drawing

AI summary

A nonvolatile semiconductor memory includes a first memory string, a first interconnect coupled to one end of the first memory string, a second interconnect coupled to another end of the first memory string, a first circuit configured to control the first interconnect in accordance with first data, and a second circuit coupled to the second interconnect, the second circuit including a current mirror circuit, and the second circuit being configured to output second data based on an amount of a current flowing through the second interconnect.