Nonvolatile Memory Device Using Opposite Polarity Pulse Voltages
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Solution Overview
Problem
Conventional semiconductor memory devices face challenges in miniaturization, particularly with resistance varying memory, where incorrect writes occur due to unipolar characteristics, leading to inefficiencies in lithography and increased product costs.
Innovation Solution
A nonvolatile semiconductor memory device with a control circuit that applies specific pulse voltages during forming, setting, and resetting operations, utilizing a variable resistor with a bidirectional diode and current limiting circuits to manage current flow, and employing multilayer metal oxide structures to suppress incorrect writes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If unipolar type resistance varying memory is used, then manufacturing is simpler, but incorrect write occurs during erase pulse application
Solution Approach 1:
The patent segments the voltage pulse application by introducing a forming operation with a specific polarity voltage before normal write/erase operations. This segmentation creates distinct operational phases: forming (first polarity), write (second polarity), and erase (first polarity), preventing incorrect writes during erase by ensuring the variable resistor is properly formed first
Solution Approach 2:
The forming operation is performed as a preliminary action before normal write and erase operations. By applying a forming voltage pulse of first polarity to create the low-resistance state initially, the patent prevents subsequent incorrect writes during erase operations, as the variable resistor has already been properly formed
2Reliability
If bipolar type resistance varying memory is used, then incorrect write is suppressed, but device complexity increases
Solution Approach 1:
The patent inverts the conventional approach by using unipolar characteristics with a forming operation instead of bipolar characteristics. The forming operation applies a voltage pulse of first polarity to initialize the variable resistor, and subsequent write/erase operations use opposite polarities, achieving reliable operation without requiring complex bipolar device structures
3Speed
If continuous current flow is allowed, then operation speed is faster, but energy loss increases
Solution Approach 1:
The patent uses periodic pulsed voltage application instead of continuous current flow. Voltage pulses of specific durations and polarities are applied sequentially for forming, writing, and erasing operations, achieving fast operation speeds while minimizing energy loss by maintaining the variable resistor in a low-resistance state only during active operations
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution reduces the risk of incorrect writes during resetting and minimizes current flow, enhancing dimensional accuracy and reducing product costs by optimizing pulse voltage application and current management.
Implementation Method 1
the variable resistor shifts from a high-resistance state to a low-resistance state, and in the resetting operation, the variable resistor shifts from the low-resistance state to the high-resistance state
Data Source
AI summary
A nonvolatile semiconductor memory device in accordance with an embodiment comprises a plurality of first, second lines, a plurality of memory cells, and a control circuit. The plurality of second lines extend so as to intersect the first lines. The plurality of memory cells are disposed at intersections of the first, second lines, and each includes a variable resistor. The control circuit is configured to control a voltage applied to the memory cells. The control circuit applies a first pulse voltage to the variable resistor during a forming operation. In addition, the control circuit applies a second pulse voltage to the variable resistor during a setting operation, the second pulse voltage having a polarity opposite to the first pulse voltage. Furthermore, the control circuit applies a third pulse voltage to the variable resistor during a resetting operation, the third pulse voltage having a polarity identical to the first pulse voltage.


