Non-volatile Memory Oxide Polysilicon Stack Second Bit Effect
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Solution Overview
Problem
Nitride-based flash memory experiences a second bit effect due to interference between data bits, which is exacerbated by reduced channel length, affecting operation window and device performance.
Innovation Solution
A non-volatile memory design featuring an oxide and polysilicon stack structure with recesses and charge storage layers, where the charge storage layers are disposed on the sides of the stack structure with a thickness between 100 Å to 150 Å and a tilting sidewall, and a conductive layer is added to prevent direct charge penetration, increasing channel length and operation window.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If the channel length is reduced to increase memory density, then the memory size reduces and storage capacity increases, but the second bit effect becomes more significant and operation window deteriorates
Solution Approach 1:
The patent extends the charge storage structure from a planar configuration to a three-dimensional structure by forming charge storage layers in recesses that protrude toward the gate structure. This vertical/dimensional extension increases the effective channel length without increasing the planar footprint, thereby maintaining memory density while improving the operation window by reducing the second bit effect.
2Productivity
If the charge storage layers are positioned closer to the gate structure to improve coupling, then the operation efficiency increases, but the interference between adjacent bits (second bit effect) worsens
Solution Approach 1:
The patent segments the charge storage structure by forming separate charge storage layers in individual recesses on opposite sides of the gate structure. This segmentation isolates the charge storage regions, allowing them to be positioned close to the gate for efficient coupling while preventing interference between adjacent bits through the physical separation provided by the gate structure and substrate.
3Reliability
If the oxide and polysilicon stack structure is used to increase channel length, then the second bit effect is reduced, but the device complexity increases
Solution Approach 1:
The patent employs an oxide and polysilicon stack structure where an oxide layer is formed on the substrate and a polysilicon layer is formed on the oxide layer. This composite structure increases the effective channel length and reduces the second bit effect. The use of standard semiconductor materials (oxide and polysilicon) that can be deposited using conventional processes helps mitigate the increase in device complexity.
Data Source
AI summary
A non-volatile memory is provided. The non-volatile memory includes a oxide and polysilicon stack structure and charge storage layers. The oxide and polysilicon stack structure is disposed on a substrate. There are recesses in the substrate at two sides of the oxide and polysilicon stack structure. The oxide and polysilicon stack structure includes an oxide layer and a polysilicon layer. The oxide layer is disposed on the substrate, wherein there is an interface between the oxide layer and the substrate. The polysilicon layer is disposed on the oxide layer. The charge storage layers are disposed in the recesses and extend to a side wall of the oxide and polysilicon stack structure, and a top surface of each of the charge storage layers is higher than the interface.