Nonvolatile Memory Page Data Retention Control

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Solution Overview

Problem

Volatile memory devices require frequent data refreshing and lose data during power-off, necessitating the use of nonvolatile memory solutions for main memory applications that retain data even when powered off, while ensuring high processing speed and security.

Innovation Solution

A nonvolatile memory system comprising a memory cell array, decoder, data I/O circuit, and control logic with a page management unit that determines whether to clear or maintain page data based on a set flag, responding to power supply voltage changes to ensure data integrity and security.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If volatile memory is used for main memory to achieve high processing speed, then processing speed is improved, but data is lost during power-off and frequent refreshing is required

Engineering Contradiction:
Improveprocessing speedVSAvoiddata retention
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The patent changes the fundamental parameter of memory volatility to non-volatility by employing nonvolatile memory devices (PRAM, MRAM, RRAM, or flash memory) instead of traditional volatile memory. This parameter change enables the memory to retain data without power while maintaining sufficient processing speed for main memory applications, thereby resolving the contradiction between speed and data retention.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If nonvolatile memory is used for main memory to retain data during power-off, then data retention is improved, but power consumption increases due to selective clearing operations

Engineering Contradiction:
Improvedata retentionVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent segments the memory space into multiple regions (first memory region and second memory region) with different data retention policies. The first region clears data in response to power-off events, while the second region maintains data. This segmentation allows selective data clearing to reduce power consumption while preserving important data, resolving the contradiction between data retention and power consumption.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent dynamically adjusts data clearing behavior based on detected power supply voltage changes. The control logic monitors voltage levels and selectively clears data from specific memory regions in response to power-off events. This dynamic approach optimizes power consumption by clearing only necessary data while maintaining other data, resolving the contradiction between data retention and power consumption.

Inventive Principle:
Principle #15Dynamics

3Object-affected harmful factors

If all page data is cleared in response to power-off to ensure security, then security is improved, but data loss increases and reprocessing time is required

Engineering Contradiction:
ImprovesecurityVSAvoidreprocessing time
Core Design Contradiction:
Object-affected harmful factorsVSLoss of time

Solution Approach 1:

The patent segments memory regions based on security requirements, with the first memory region configured to clear data for security purposes and the second region configured to maintain data. This segmentation allows the system to clear data from security-sensitive regions while preserving data in non-sensitive regions, thereby improving security without requiring complete data clearing and reducing reprocessing time.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent performs preliminary classification of data into different retention categories before power-off events occur. By pre-configuring memory regions with different clearing behaviors and using control logic to determine which regions to clear, the system prepares security measures in advance. This preliminary action ensures security compliance while avoiding unnecessary data clearing and reducing reprocessing time.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS10031702B2Nonvolatile memory and a nonvolatile memory system
Publication Date: 2018.07.24 SAMSUNG ELECTRONICS CO LTD
  • US10031702B2 patent drawing
  • US10031702B2 patent drawing
  • US10031702B2 patent drawing

AI summary

A nonvolatile memory including: a memory cell array including a plurality of nonvolatile memory cells; a decoder connected to the memory cell array through a plurality of word lines; a data input/output (I/O) circuit connected to the memory cell array through a plurality of bit lines; and control logic configured to control the decoder and the data I/O circuit in response to a change in a power supply voltage to clear or maintain individual pieces of page data. The control logic includes a page management unit that determines whether to clear data included in the individual pieces of page data based on a value of a set flag respectively corresponding to the individual pieces of page data.