Nonvolatile Memory Programming via Periodic Soft Pulses
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Solution Overview
Problem
Conventional methods for programming and erasing nonvolatile memory devices with charge storage layers are inefficient due to the need for multiple pulses and time delays, which can lead to suboptimal charge redistribution and threshold voltage changes in memory cells.
Innovation Solution
Implementing a method that includes multiple programming or erasing pulses and time delays, with alternating soft erase or program operations, to allow for charge redistribution and recombination in the charge trap layer, thereby optimizing the threshold voltage changes during programming and erasing processes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If multiple programming or erasing pulses with time delays are applied to a nonvolatile memory device, then charge redistribution and recombination in the charge trap layer is optimized, but the programming and erasing operation time increases
Solution Approach 1:
The patent applies periodic pulsed voltages with specific time delays between pulses to the word line and substrate. This periodic action allows charge to redistribute and recombine in the charge trap layer between pulses, optimizing threshold voltage changes while maintaining controlled operation time through defined pulse sequences
Solution Approach 2:
The patent applies preliminary soft erase or program pulses before the main programming or erasing operation. These preliminary actions prepare the charge trap layer by initiating charge redistribution, which improves the effectiveness of subsequent main operations and reduces the total time required for complete programming or erasing
2Productivity
If alternating soft erase or program operations are implemented during programming or erasing, then charge redistribution efficiency is improved, but the operational complexity increases
Solution Approach 1:
The patent segments the programming or erasing operation into multiple unit loops, each containing alternating soft erase or program pulses. This segmentation allows charge redistribution to occur in controlled stages, improving efficiency while managing complexity through modular, repeatable operation sequences
Solution Approach 2:
The patent changes operational parameters by alternating between soft erase and program pulses with different voltage levels and durations. This parameter variation optimizes charge redistribution at different stages of the operation, improving productivity while the systematic parameter changes keep the operational complexity manageable
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the efficiency of programming and erasing operations by ensuring effective charge redistribution and reducing threshold voltage changes, leading to improved performance and reliability in nonvolatile memory devices.
Implementation Method 1
allow for charge redistribution and recombination in the charge trap layer, thereby optimizing the threshold voltage changes during programming and erasing processes
Data Source
AI summary
Methods of programming or erasing a nonvolatile memory device having a charge storage layer including performing at least one unit programming or erasing loop, each unit programming or erasing loop including applying at least one programming pulse, at least one erasing pulse, at least one time delay, at least one soft erase pulse, at least one soft programming pulse and/or at least one verifying pulse as a positive or negative voltage to a portion (for example, a word line or a substrate) of the nonvolatile memory device.