Non-Volatile Memory Persistence Mechanism for Computing Devices

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Solution Overview

Problem

Existing persistence mechanisms are limited in making systems fully non-volatile, introducing significant overhead and failing to provide orthogonal persistence during power failures, as they require external power sources and exhibit latency in resuming system states.

Innovation Solution

A method and apparatus for a computing device that includes a processor and non-volatile memory, which performs a stop procedure upon power failure by scheduling out process tasks, storing their states, flushing caches, and reporting offline to master tiles, and a go procedure upon power recovery by restoring tasks and peripheral information from memory modules.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If hibernation is used to provide persistence, then system state can be recovered, but external power sources are required and the system cannot operate during power failure

Engineering Contradiction:

Improvesystem recovery capabilityVSAvoidexternal power dependency

Core Design Contradiction:

ReliabilityVSUse of energy by moving object

Solution Approach 1:

The system performs self-preservation by automatically flushing cache data and process states to non-volatile memory before power failure, eliminating dependency on external power sources for persistence operations

Inventive Principle:

Principle #25Self-service

2Reliability

If checkpoint-restarts are used for persistence, then system can resume after failure, but significant overhead is introduced due to redundant data dumps

Engineering Contradiction:

Improvesystem resumption capabilityVSAvoidsystem overhead

Core Design Contradiction:

ReliabilityVSProductivity

Solution Approach 1:

The invention extracts only the essential process state information and cache data that need to be persisted, rather than dumping redundant system-wide checkpoint data, thereby reducing overhead while maintaining resumption capability

Inventive Principle:

Principle #2Taking out (Extraction)

Solution Approach 2:

The system performs partial persistence by selectively flushing only the necessary process control blocks and cache lines to non-volatile memory, avoiding the excessive action of complete system checkpointing

Inventive Principle:

Principle #16Partial or excessive action

3Reliability

If checkpoint-restarts are used, then system can recover from failure, but kernel reboot is required causing extra latency

Engineering Contradiction:

Improvefailure recoveryVSAvoidresumption latency

Core Design Contradiction:

ReliabilityVSLoss of time

Solution Approach 1:

The system performs preliminary actions by pre-flushing cache and storing process states to non-volatile memory before power failure occurs, enabling immediate resumption without kernel reboot and reducing resumption latency

Inventive Principle:

Principle #10Preliminary action

Data Source

PatentUS11656967B2Method and apparatus for supporting persistence and computing device

Publication Date: 2023.05.23 MEMRAY CORP

AI summary

A method of supporting persistence of a computing device is provided. The computing device performs a stop procedure upon power failure. In the stop procedure, the computing device schedules out a running process task, stores a state of the process task to a process control block of a memory module including a non-volatile memory, flushes a cache for the processor, and flushes a pending memory request.