Non-volatile Memory Potential Well Charge Leakage
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Solution Overview
Problem
Non-volatile memory devices face data loss and functionality errors due to external and internal factors, necessitating improvements in their characteristics to enhance durability and reduce power consumption.
Innovation Solution
The implementation of a non-volatile memory device structure that includes a control gate electrode, charge storage insulation layer, tunnel insulation layer, blocking insulation layer, and a material layer with an energy level constituting the bottom of a potential well, which reduces charge leakage by creating inner potential barriers between these layers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a conventional non-volatile memory device structure is used, then the device can store data, but charge leakage occurs through the tunnel and blocking insulation layers causing data loss and reduced reliability
Solution Approach 1:
The patent divides the charge storage insulation layer into multiple distinct layers: a tunnel insulation layer, a charge storage insulation layer, and a blocking insulation layer. This segmentation creates multiple interfaces and potential barriers that collectively reduce charge leakage while maintaining data storage functionality.
Solution Approach 2:
The patent introduces a material layer with specific energy levels positioned between the tunnel insulation layer and the blocking insulation layer. This intermediary layer creates inner potential barriers that act as additional obstacles to charge leakage, thereby improving data retention without compromising the overall device structure.
2Reliability
If thicker tunnel and blocking insulation layers are used to reduce charge leakage, then reliability improves, but program efficiency decreases and power consumption increases
Solution Approach 1:
The patent optimizes the energy level parameters of the material layer to create effective potential barriers. By carefully selecting materials with appropriate energy levels (where the Fermi level or bottom of conduction band constitutes the bottom of a potential well), the device achieves high reliability with thinner insulation layers, thereby reducing power consumption during programming operations.
Solution Approach 2:
The patent employs a composite structure combining different insulation materials (tunnel insulation layer, charge storage insulation layer, blocking insulation layer) with a material layer having specific energy characteristics. This composite approach enables effective charge blocking with optimized thickness, balancing reliability and power consumption.
3Reliability
If multiple insulation layers are added to create potential barriers, then charge leakage is reduced, but device complexity increases
Solution Approach 1:
The patent segments the gate insulation structure into functionally distinct layers, each with a specific role: tunneling, charge storage, and blocking. This segmentation achieves high reliability through multiple potential barriers while maintaining a systematic and manufacturable structure that follows conventional semiconductor fabrication processes.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enhances data retention, improves program efficiency, and reduces power consumption by minimizing charge leakage through the tunnel and blocking insulation layers, resulting in a more reliable and durable non-volatile memory device.
Implementation Method 1
a material layer between the tunnel insulation layer and the blocking insulation layer, the material layer having an energy level constituting a bottom of a potential well
Data Source
AI summary
Non-volatile memory devices are provided including a control gate electrode on a substrate; a charge storage insulation layer between the control gate electrode and the substrate; a tunnel insulation layer between the charge storage insulation layer and the substrate; a blocking insulation layer between the charge storage insulation layer and the control gate electrode; and a material layer between the tunnel insulation layer and the blocking insulation layer, the material layer having an energy level constituting a bottom of a potential well.