Non-Volatile Memory Program Disturb Reduction via Localized Boosting

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Solution Overview

Problem

Existing non-volatile flash memory technologies face challenges in reducing program disturb, particularly as memory devices scale, leading to unintended programming of unselected cells due to voltage differentials and Gate Induced Drain Leakage (GIDL), which affects threshold voltage distribution and data integrity.

Innovation Solution

Applying different boosting voltages to unselected memory cells during programming operations, where higher boosting signals are applied to specific cells and lower signals to others, to prevent unintended programming and minimize GIDL effects, thereby maintaining accurate threshold voltage distributions.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If uniform boosting voltage is applied to all unselected memory cells, then program disturb is reduced to some extent, but threshold voltage distribution becomes inaccurate and GIDL effects increase

Engineering Contradiction:
Improveprogram disturb reductionVSAvoidthreshold voltage distribution accuracy
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The patent applies different boosting voltages to different groups of unselected memory cells based on their specific characteristics. Cells that have completed programming receive one boosting voltage level, while cells that have not completed programming receive a different boosting voltage level. This local differentiation resolves the contradiction by tailoring the boosting voltage to the specific state of each cell group, thereby maintaining accurate threshold voltage distributions while effectively reducing program disturb.

Inventive Principle:
Principle #3Local quality

2Reliability

If higher boosting voltage is applied to all unselected cells, then program disturb is further reduced, but GIDL effects increase and affect data integrity

Engineering Contradiction:
Improveprogram disturb reductionVSAvoidGIDL effects
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

The patent dynamically adjusts the boosting voltage parameter based on the programming state of unselected memory cells. By changing the voltage parameter from a uniform high level to differentiated levels (higher for cells that completed programming, lower for cells that did not), the patent reduces program disturb while minimizing GIDL effects. This parameter adaptation resolves the contradiction by optimizing the boosting voltage for each cell group's specific needs.

Inventive Principle:
Principle #35Parameter changes

3Quantity of substance

If memory devices are scaled down, then storage capacity increases, but program disturb increases due to voltage differentials

Engineering Contradiction:
Improvestorage capacityVSAvoidprogram disturb
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The patent addresses scaling-induced program disturb by applying localized quality control through differentiated boosting voltages. As memory devices scale down, the patent identifies and treats different cell groups with appropriate voltage levels based on their programming status, thereby compensating for the increased vulnerability to program disturb in scaled devices while maintaining high storage capacity.

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach effectively reduces program disturb and maintains precise threshold voltage distributions, enhancing data integrity and reliability in multi-state flash memory devices.

Implementation Method 1

Gate Induced Drain Leakage (GIDL), which affects threshold voltage distribution and data integrity

Methodology Applied
Scientific EffectGate Induced Drain Leakage (GIDL):

Data Source

PatentUS8184478B2Apparatus with reduced program disturb in non-volatile storage
Publication Date: 2012.05.22 SANDISK TECHNOLOGIES LLC
  • US8184478B2 patent drawing
  • US8184478B2 patent drawing
  • US8184478B2 patent drawing

AI summary

A non-volatile semiconductor storage system is programmed in a manner that reduces program disturb by applying a higher boosting voltage on one or more word lines that are connected to non-volatile storage elements that may be partially programmed.