Nonvolatile Memory Program Disturb Prevention via Word Line Voltage Control
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Solution Overview
Problem
NAND flash memory devices experience program disturbances due to the application of a uniform program voltage to all cells connected to a word line, affecting unselected memory cells and leading to unintended programming of program inhibit cells.
Innovation Solution
The implementation of a nonvolatile memory device with a word line driver that alternately drives even and odd word lines with specific voltages, including a drop to ground voltage, and a pass transistor unit with high voltage NMOS transistors to increase the voltage change across word lines, preventing program disturbances by enhancing channel voltage for program inhibit cells.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a uniform program voltage is applied to all cells connected to a word line, then programming operation can be performed, but program disturbance occurs in unselected memory cells
Solution Approach 1:
The patent segments the word lines into even and odd groups, applying different voltage patterns to each group. During programming, selected word lines receive program voltage while alternate unselected word lines receive ground voltage, preventing program disturbance in unselected cells while maintaining programming capability.
Solution Approach 2:
The patent applies different voltage conditions to different spatial locations (even vs odd word lines). By locally grounding alternate unselected word lines during programming operations, it creates distinct voltage environments for selected and unselected cells, preventing unintended programming while preserving programming function for targeted cells.
2Productivity
If program voltage is applied to selected word line, then selected memory cells can be programmed, but channel voltage of program inhibit cells increases causing unintended programming
Solution Approach 1:
The patent applies ground voltage to alternate unselected word lines in advance before and during the programming operation. This preliminary anti-action counteracts the voltage coupling effect that would otherwise cause channel voltage increase in program inhibit cells, preventing unintended programming before it can occur.
Solution Approach 2:
The patent introduces ground voltage as an intermediary condition for unselected word lines. This intermediary voltage state acts as a buffer that prevents the propagation of program voltage effects to adjacent unselected cells, isolating the programming operation to only the intended selected cells.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively reduces or prevents program disturbances by increasing the voltage change across word lines, ensuring accurate programming of selected memory cells while maintaining the integrity of unselected cells.
Implementation Method 1
increase the voltage change across word lines, preventing program disturbances by enhancing channel voltage for program inhibit cells
Implementation Method 2
electrons of the memory cell transistor MTiA are tunneled from a channel to the floating gate, thereby shifting a threshold voltage of the memory cell transistor MTiA to a positive voltage
Data Source
AI summary
A nonvolatile memory device for preventing program disturbances includes a memory cell array block, a word line driver, and a well bias control unit. The memory cell array block includes at least one cell string having a plurality of memory cells serially connected to a bit line and alternately connected to even word lines and odd word lines. After a program verification, the word line driver drives the even word lines with a first voltage and then the odd word lines with the first voltage to drop the even word line to a voltage lower than the first voltage. The well bias control unit floats a bias of a p-well formed by high voltage NMOS transistors that apply corresponding driving voltages to the even word lines and the odd word lines according to an operation mode of a program operation, a read operation, and an erase operation.


