Non-volatile Memory Program Method for Read Disturbance Mitigation
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Solution Overview
Problem
Highly integrated semiconductor memory devices face issues with data reliability due to read disturbance and charge leakage, leading to reduced storage device reliability.
Innovation Solution
A nonvolatile memory device program method that includes generating a seed based on a write address, randomizing write data using the seed, and programming the randomized data to memory cells, with state shaping performed depending on the location of word lines to optimize threshold voltage distribution and reduce the number of memory cells in vulnerable states.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the storage device is scaled down to increase degree of integration, then manufacturing cost is reduced and capacity is increased, but read disturbance and charge leakage occur leading to reduced reliability
Solution Approach 1:
The patent applies local quality by differentiating the treatment of memory cells based on their spatial location within the array. Specifically, it identifies and separately manages first memory cells located at positions more susceptible to read disturbance and second memory cells at positions less susceptible. This localized differentiation allows targeted mitigation of reliability issues in high-risk areas while maintaining overall system performance and integration density.
Solution Approach 2:
The patent converts the harmful effect of read disturbance into a beneficial control mechanism. By monitoring which memory cells experience read disturbance during operations, the system uses this information to intentionally program certain cells to specific threshold voltage ranges. This transforms the previously harmful read disturbance effect into a useful signal for optimizing data retention and reducing charge leakage in vulnerable memory locations.
2Reliability
If the number of memory cells in vulnerable states is reduced, then reliability is improved, but the complexity of state management increases
Solution Approach 1:
The patent segments the memory array into distinct groups based on their vulnerability to read disturbance. It divides memory cells into first memory cells (more vulnerable) and second memory cells (less vulnerable), and further segments them by threshold voltage ranges. This segmentation allows the system to manage different cell types with different programming strategies, reducing overall state management complexity through structured classification rather than uniform handling.
Solution Approach 2:
The patent implements dynamic state management by adjusting the programming strategy based on real-time operational conditions. The system dynamically determines which memory cells should be programmed to which threshold voltage ranges based on their location and observed read disturbance characteristics. This dynamic adaptation allows the system to optimize reliability without requiring complex static reconfiguration of the entire memory array.
Data Source
AI summary
A program method of a nonvolatile memory device including receiving a write address and write data, generating a seed corresponding to the write address, generating a random sequence by using the seed, randomizing the write data by using the random sequence, and programming the randomized write data to a memory area corresponding to the write address may be provided. The seed may provide state shaping variable depending on a location of a word line, at which the received write data is to be programmed.