Non-volatile Memory Programming with Dynamic Voltage Step Control

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Solution Overview

Problem

Existing programming methods for non-volatile memory cells often result in overstressing, leading to reduced device lifetime due to fixed program conditions that fail to account for cell-to-cell variations and ambient changes.

Innovation Solution

A method involving iterative pulses of programming voltages with incremental increases, allowing for precise programming of memory cells by adjusting voltage step sizes based on read current thresholds, thereby minimizing overstressing and ensuring reliable programming without over-programming.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If fixed program conditions are used for all memory cells under all ambient conditions, then design simplicity is achieved, but memory cells are overstressed during programming leading to reduced device lifetime

Engineering Contradiction:
Improvedesign simplicityVSAvoiddevice lifetime
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The patent implements dynamic programming conditions that adapt to each memory cell's actual state and ambient conditions. Instead of fixed program voltages and times for all cells, the system continuously monitors read current thresholds and adjusts programming parameters in real-time, allowing each cell to be programmed with the minimum necessary stress to achieve the desired state, thereby extending device lifetime while maintaining design feasibility through automated control

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes programming parameters (voltages, times, step values) based on observed read current thresholds and cell response. By dynamically adjusting these parameters rather than using fixed values, the system optimizes each programming operation to apply only the necessary stress to each cell, reducing cumulative damage and extending endurance while still achieving reliable programming across all cells

Inventive Principle:
Principle #35Parameter changes

2Reliability

If fixed program conditions with wide margins are used to accommodate cell variations, then all cells can be programmed reliably, but most memory cells are overstressed leading to shortened endurance and data retention

Engineering Contradiction:
Improveprogramming reliabilityVSAvoidendurance and data retention
Core Design Contradiction:
ReliabilityVSDuration of action of stationary object

Solution Approach 1:

The patent dynamically adjusts programming parameters including voltage levels, pulse durations, and step values based on real-time read current measurements. This allows the system to use minimal necessary programming stress for each cell rather than applying fixed wide margins to all cells, achieving reliable programming while reducing cumulative damage and extending endurance and data retention

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The system uses each memory cell's own read current response to determine its programming requirements. By monitoring the cell's actual electrical characteristics during programming and using that feedback to control the programming process, each cell programs itself with the appropriate amount of stress, eliminating the need for conservative over-programming while ensuring reliable programming across all cells

Inventive Principle:
Principle #25Self-service

3Manufacturing precision

If iterative programming with multiple read operations is implemented, then precise programming is achieved, but programming time increases

Engineering Contradiction:
Improveprogramming precisionVSAvoidprogramming time
Core Design Contradiction:
Manufacturing precisionVSLoss of time

Solution Approach 1:

The patent implements dynamic step values that adjust during the iterative programming process. Early programming steps use larger voltage or time increments to quickly approach the target state, while later steps use smaller increments for fine-tuning. This adaptive approach achieves precise programming while minimizing the total number of iterations required, reducing overall programming time compared to using fixed small steps throughout

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent uses periodic programming pulses separated by read verification operations. By structuring the programming as periodic cycles of program-verify-program, the system efficiently achieves precise programming through feedback control. The periodic nature allows for systematic progression toward the target state while maintaining speed through optimized pulse sequences and verification timing

Inventive Principle:
Principle #19Periodic action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enhances endurance and data retention by reducing cell degradation and accommodating ambient changes, applicable to both multi-level and single-level cell memory devices.

Implementation Method 1

During programming, the selected memory cell is programmed through efficient hot-electron injection, where electrons traveling along the substrate are injected onto the floating gate giving the floating gate a negative charge.

Methodology Applied
Scientific EffectHot-electron injection:

Implementation Method 2

During erasing, the selected cell is erased by causing the electrons to tunnel off the floating gate via the Fowler-Nordheim mechanism.

Methodology Applied
Scientific EffectFowler-Nordheim tunneling:

Data Source

PatentEP2973583B1Non-volatile memory program algorithm device and method
Publication Date: 2019.05.01 SILICON STORAGE TECHNOLOGY INC
  • EP2973583B1 patent drawingFigure 1
  • EP2973583B1 patent drawingFigure 2
  • EP2973583B1 patent drawingFigure 3

AI summary

A non- volatile memory device and method for programming cells using repeated pulses of program voltages, with interleaved read operations to determine the level of read current, until the desired programming state is achieved. Each successive program pulse has one or more program voltages increased by a step value relative to the previous pulse. For a single level cell type, each cell is individually removed from the programming pulses after reaching a first read current threshold, and the step value is increased for one or more kicker pulses thereafter. For a multi-level cell type, the step value drops after one of the cells reaches a first read current threshold, some cells are individually removed from the programming pulses after reaching a second read current threshold while others are individually removed from the programming pulses after reaching a third read current threshold.