Nonvolatile Memory Programming With Reduced Verify Steps
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Solution Overview
Problem
Conventional programming techniques for non-volatile memory require numerous verify operations, especially for multi-level memory cells, which increases programming time and can result in a broadening of the threshold voltage distribution, leading to reduced programming resolution and increased latency.
Innovation Solution
A method where memory cells are programmed in parallel using a staircase waveform, with initial verification relative to a test reference threshold value to assess overshoot, and subsequent programming rate adjustments are made to maintain a tighter threshold distribution, even with reduced verify operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If conventional programming techniques with multiple verify operations are used, then programming resolution is maintained, but programming time increases and threshold voltage distribution broadens
Solution Approach 1:
The patent applies preliminary action by performing an initial verify operation before the main programming sequence to establish a reference threshold. This preliminary verification allows the system to predict the number of program pulses needed, eliminating the need for multiple intermediate verify operations while maintaining programming resolution. The initial verify sets the stage for subsequent programming without requiring continuous verification.
Solution Approach 2:
The patent implements skipping by rushing through the programming process using a calculated number of pulses determined from the initial verify. Instead of performing verify operations after every program pulse, the method skips directly to the target threshold by calculating the required pulse count in advance. This rushing through the programming sequence significantly reduces programming time while maintaining resolution through the initial reference measurement.
2Productivity
If the number of verify operations is reduced, then programming efficiency improves, but threshold voltage distribution broadens
Solution Approach 1:
The patent uses preliminary action by performing an initial verify operation that establishes a reference threshold voltage. This preliminary measurement allows the system to calculate the exact number of program pulses needed to reach the target threshold, enabling efficient programming without intermediate verifies while maintaining tight threshold distribution. The initial reference point ensures stable composition control throughout the programming process.
3Measurement precision
If multiple verify operations are performed for multi-level memory cells, then programming accuracy is maintained, but latency increases
Solution Approach 1:
For multi-level memory cells, the patent applies preliminary action by performing a single initial verify operation that establishes a reference threshold. Based on this initial measurement, the system calculates the precise number of program pulses needed to reach each target level, eliminating the need for multiple intermediate verify operations. This approach maintains programming accuracy for multi-level cells while significantly reducing latency compared to conventional methods.
Solution Approach 2:
The patent implements skipping by rushing through the multi-level programming process using pre-calculated pulse counts. Instead of verifying after each program pulse or at multiple intermediate stages, the method skips directly to each target threshold level by applying the calculated number of pulses in sequence. This rushing through approach maintains accuracy while minimizing latency for multi-level memory programming.
Data Source
AI summary
A group of memory cells of a nonvolatile memory is programmed in parallel in a programming pass with a minimum of verify steps from an erased state to respective target states by a staircase waveform. The memory states are demarcated by a set of increasing demarcation threshold values (V1, . . . , VN). Initially in the programming pass, the memory cells are verified relative to a test reference threshold value. This test reference threshold has a value offset past a designate demarcation threshold value Vi among the set by a predetermined margin. The overshoot of each memory cell when programmed past Vi, to be more or less than the margin can be determined. Accordingly, memory cells found to have an overshoot more than the margin are counteracted by having their programming rate slowed down in a subsequent portion of the programming pass so as to maintain a tighter threshold distribution.