Non-volatile Memory Programming Method Reducing Disturbance

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Solution Overview

Problem

Existing nonvolatile memory devices face program disturbance issues due to high programming voltages, which affect neighboring cells and reduce memory performance.

Innovation Solution

A method and device that perform a single-pulse program operation followed by a multi-pulse program operation when a condition is satisfied, with the multi-pulse operation applying lower program pulses and verification pulses to reduce disturbance and improve reliability.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If a high-voltage incremental operation pulse programming (ISPP) method is used to program memory cells, then programming speed and completion are improved, but program disturbance to neighboring cells increases

Engineering Contradiction:

Improveprogramming speedVSAvoidprogram disturbance

Core Design Contradiction:

ProductivityVSObject-affected harmful factors

Solution Approach 1:

The programming operation is divided into multiple program loops with different pulse structures. Early program loops use single-pulse programming to minimize disturbance, while later program loops use multi-pulse programming to complete the programming task. This segmentation allows the system to balance programming speed with disturbance reduction at different stages of the programming process.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The programming pulse structure is made dynamic and adaptive based on the programming status. The control logic determines whether to apply single-pulse or multi-pulse programming in each program loop based on real-time conditions. This dynamic adjustment allows the system to optimize between speed and disturbance reduction depending on the current programming state.

Inventive Principle:

Principle #15Dynamics

2Reliability

If multiple program pulses are applied to complete programming, then programming reliability is improved, but program disturbance to neighboring cells increases

Engineering Contradiction:

Improveprogramming reliabilityVSAvoidprogram disturbance

Core Design Contradiction:

ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The multiple program pulses are segmented into different phases: single-pulse programming in early program loops and multi-pulse programming in later program loops. This segmentation ensures that the total number of pulses needed for reliable programming is maintained while distributing the disturbance impact across different stages, with later pulses (which cause more disturbance) being applied only when necessary.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

The programming pulse parameters (number of pulses per loop, voltage levels) are changed dynamically based on the program pass/fail status. When programming fails, the system transitions to multi-pulse mode with adjusted parameters to ensure completion. This parameter adaptation maintains reliability while minimizing unnecessary disturbance from excessive pulsing.

Inventive Principle:

Principle #35Parameter changes

3Object-affected harmful factors

If a single-pulse program operation is used in all program loops, then program disturbance is reduced, but programming performance and completion efficiency deteriorate

Engineering Contradiction:

Improveprogram disturbanceVSAvoidprogramming performance

Core Design Contradiction:

Object-affected harmful factorsVSProductivity

Solution Approach 1:

The pulse structure transitions dynamically from single-pulse to multi-pulse mode as programming progresses and based on pass/fail conditions. This dynamic adaptation allows the system to start with low-disturbance single-pulse programming and switch to higher-performance multi-pulse programming only when necessary, optimizing both disturbance reduction and programming performance.

Inventive Principle:

Principle #15Dynamics

Solution Approach 2:

The programming process uses periodic verification between program loops to determine whether to continue with single-pulse or switch to multi-pulse mode. This periodic assessment allows the system to maintain single-pulse operation for as long as possible (minimizing disturbance) while switching to multi-pulse when performance requirements demand it.

Inventive Principle:

Principle #19Periodic action

Data Source

PatentUS11823753B2Non-volatile memory device, programming method thereof, and storage device having the same

Publication Date: 2023.11.21 SAMSUNG ELECTRONICS CO LTD

AI summary

A method of programming a nonvolatile memory device includes performing a single-pulse program operation in a program loop, determining whether a condition is satisfied in the a program loop, and performing a multi-pulse program operation in a next program loop when the condition is satisfied. The single-pulse program operation includes applying a first program pulse and applying plural verification pulses, the multi-pulse program operation includes applying a second program pulse, applying a third program pulse, and applying plural verification pulses, and each of the second program pulse and the third program pulse has a level lower than a level of the first program pulse.