Non-volatile Memory One-Sided Voltage Ramp Down

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Solution Overview

Problem

In non-volatile memory systems, particularly in NAND-type flash memory, there is an issue with preventing 'disturb' in unselected memory cells during programming, where lack of access to pre-charging sources can hinder the boosting of channels, leading to unintended programming of unselected cells.

Innovation Solution

The system transitions from program-verify to the next programming dose by concurrently lowering the voltage on the selected word line and adjacent word lines on one side, then successively lowers voltages on word lines on the opposite side, ensuring unselected memory cells are pre-charged before boosting to prevent disturb.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If voltage is lowered concurrently on selected word line and adjacent word lines on one side, then programming speed is improved, but unselected memory cells may experience disturb

Engineering Contradiction:
Improveprogramming speedVSAvoiddata integrity
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent applies preliminary action by pre-charging unselected memory cells before the voltage ramp-down phase. Specifically, unselected memory cells are pre-charged to a first voltage level before the selected word line voltage is reduced, ensuring they are protected against disturb during the programming operation. This preliminary charging action prevents the contradiction from manifesting by preparing the unselected cells in advance.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If voltage is lowered successively on word lines on opposite side, then unselected memory cells are pre-charged to prevent disturb, but programming complexity increases

Engineering Contradiction:
Improvedata integrityVSAvoidprogramming complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies segmentation by dividing the word lines into different groups with different charging sequences. Specifically, word lines on one side of the selected word line are charged in a first sequence, while word lines on the other side are charged in a second sequence. This segmentation allows complex pre-charging requirements to be managed through structured, modular voltage application patterns.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent applies local quality by applying different voltage charging sequences to different spatial regions. Unselected memory cells adjacent to the selected word line on one side receive pre-charging in a different sequence than those on the opposite side. This localized differentiation optimizes disturb prevention for each region while managing overall system complexity.

Inventive Principle:
Principle #3Local quality

3Reliability

If pre-charging is performed before boosting, then disturb in unselected memory cells is prevented, but programming time increases

Engineering Contradiction:
Improvedata integrityVSAvoidprogramming time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent applies continuity of useful action by overlapping the pre-charging phase with the boosting phase rather than executing them as separate sequential operations. The pre-charging voltage is applied and maintained while the boosting operation proceeds, allowing both functions to occur concurrently. This eliminates idle time between operations while ensuring unselected cells are protected throughout the entire programming process.

Inventive Principle:
Principle #20Continuity of useful action

Data Source

PatentUS11972819B2Non-volatile memory with one sided phased ramp down after program-verify
Publication Date: 2024.04.30 SANDISK TECHNOLOGIES LLC
  • US11972819B2 patent drawing
  • US11972819B2 patent drawing
  • US11972819B2 patent drawing

AI summary

In a non-volatile memory system that performs programming of selected memory cells (in coordination with pre-charging and boosting of channels for unselected memory cells) and program-verify to determine whether the programming was successful, the system transitions from program-verify to the next dose of programming by concurrently lowering a voltage applied to a selected word line and voltages applied to word lines on a first side of the selected word line at the conclusion of program-verify. Subsequent to lowering the voltage applied to the selected word line, the system successively lowers voltages applied to groups of one or more word lines on a second side of the selected word line at the conclusion of program-verify beginning with a group of one or more word lines immediately adjacent the selected word line and progressing to other groups of one or more word lines disposed increasingly remote from the selected word line.