Nonvolatile Memory Read Voltage Compensation via Retention Groups

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Solution Overview

Problem

Nonvolatile memory devices face read failures due to variations in threshold voltage distributions caused by factors like charge leakage and temperature changes, leading to increased read latency and degraded performance.

Innovation Solution

The method involves dividing memory blocks into retention groups, generating time-difference information and offset information to adjust read voltages, and using an artificial neural network to generate compensated read voltages, thereby improving read operation success and performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If a fixed read sequence is adopted, then the read operation structure is simple, but read latency increases and performance degrades when operating conditions vary

Engineering Contradiction:
Improveread operation structureVSAvoidread latency
Core Design Contradiction:
Device complexityVSLoss of time

Solution Approach 1:

The patent implements a dynamic read sequence that adapts to varying operating conditions such as temperature and erase program interval. Instead of using a fixed read sequence, the system dynamically selects and adjusts the read sequence based on real-time condition detection, thereby reducing read latency and improving performance without excessive complexity

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the parameters of the read operation based on detected operating conditions. By monitoring parameters like temperature and EPI, the system adjusts read voltage levels and sequence timing parameters dynamically, allowing optimal read performance under varying conditions while maintaining manageable system complexity

Inventive Principle:
Principle #35Parameter changes

2Reliability

If read voltages are adjusted to compensate for threshold voltage variations, then read accuracy improves, but device complexity and control difficulty increase

Engineering Contradiction:
Improveread operation success probabilityVSAvoidvoltage control system
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent employs feedback mechanisms where the system monitors operating conditions (temperature, EPI) and uses this information to adjust read voltages dynamically. This closed-loop approach improves read accuracy by compensating for threshold voltage variations while managing complexity through condition-based control strategies

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The system performs preliminary detection of operating conditions and pre-adjusts read voltages before actual read operations. By detecting temperature and EPI in advance and preparing appropriate voltage compensation values, the system improves read reliability without requiring complex real-time control during the read operation itself

Inventive Principle:
Principle #10Preliminary action

3Reliability

If multiple read operations are performed with different sequences, then read reliability improves, but read latency and time loss increase

Engineering Contradiction:
Improveread operation successVSAvoidread latency
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent implements dynamic read sequence selection that adapts to operating conditions. Instead of always performing multiple read operations with different sequences, the system dynamically determines the appropriate read sequence based on detected conditions, achieving reliable reads while minimizing unnecessary time delays

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system changes read operation parameters including voltage levels and sequence timing based on detected operating conditions. By adjusting these parameters dynamically, the system achieves reliable read operations with a single optimized read sequence in many cases, reducing the need for multiple retry operations and associated latency

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS11775203B2Storage device including nonvolatile memory device and method of operating the same
Publication Date: 2023.10.03 SAMSUNG ELECTRONICS CO LTD
  • US11775203B2 patent drawing
  • US11775203B2 patent drawing
  • US11775203B2 patent drawing

AI summary

A method of operating a nonvolatile memory device is provided. The method includes: dividing a memory block of a plurality of memory blocks provided in the nonvolatile memory device into a plurality of retention groups; generating time-difference information including a plurality of erase program interval (EPI) values corresponding to the plurality of retention groups; generating offset information including a plurality of offset values corresponding to differences between a plurality of default read voltages and a plurality of corrected read voltages; generating compensated read voltages corresponding to a read address based on the offset information and the time-difference information; and performing a read operation to read data from the nonvolatile memory device based on the read address and the compensated read voltages.