Nonvolatile Memory Row Decoder Read Disturb Compensation

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Solution Overview

Problem

The high degree of integration in semiconductor storage devices leads to reliability issues due to potential damage to data stored, necessitating a method to enhance the reliability of nonvolatile memory devices.

Innovation Solution

A nonvolatile memory device with a row decoder circuit that applies specific voltage waveforms to string select, ground select, and dummy word lines during data read operations, including prepulses to turn on and off memory cells, thereby suppressing boosting voltages in unselected cell strings and improving data integrity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If high degree of integration is implemented in storage device, then manufacturing cost is reduced, but reliability of data storage deteriorates due to potential damage to stored data

Engineering Contradiction:
Improvemanufacturing costVSAvoiddata storage reliability
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The patent applies preliminary action by implementing a read-disturb compensation mechanism that proactively detects and corrects threshold voltage shifts caused by read operations before they accumulate and cause data errors. The system performs read operations with compensation voltages that prevent hot electron injection and Fowler-Nordheim tunneling, thereby preemptively maintaining data integrity in highly integrated memory structures where read disturbances are more severe.

Inventive Principle:
Principle #10Preliminary action

2Productivity

If read operation is performed on memory cells, then data is retrieved, but threshold voltage of memory cells changes due to hot electron injection and Fowler-Nordheim tunneling

Engineering Contradiction:
Improvedata retrieval speedVSAvoidthreshold voltage stability
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

The patent applies parameter changes by dynamically adjusting the read voltage waveform parameters (amplitude, duration, slope) based on the selected memory cell location and operation mode. The row decoder circuit generates customized read voltages with different characteristics for different word lines and memory blocks, optimizing the balance between fast data retrieval and minimizing threshold voltage shifts caused by hot electron injection and Fowler-Nordheim tunneling.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent implements feedback through a read-disturb compensation mechanism that monitors threshold voltage changes in memory cells after read operations and applies corrective voltages to restore the original threshold voltage distribution. This feedback loop prevents cumulative read disturbances from degrading data reliability, allowing frequent read operations without compromising long-term storage integrity.

Inventive Principle:
Principle #23Feedback

3Ease of operation

If voltage waveforms are applied to turn on and off memory cells during read operation, then data reading is enabled, but boosting voltages are generated in unselected cell strings causing potential damage

Engineering Contradiction:
Improvedata reading capabilityVSAvoidboosting voltage in unselected cell strings
Core Design Contradiction:
Ease of operationVSObject-generated harmful factors

Solution Approach 1:

The patent applies preliminary anti-action by implementing a clamp circuit that preemptively limits the maximum voltage amplitude in unselected cell strings during read operations. The clamp circuit activates before boosting voltages can cause harmful effects, clamping the voltage to a safe level that prevents hot electron injection and Fowler-Nordheim tunneling in unselected memory cells while allowing normal read operations to proceed in selected cells.

Inventive Principle:
Principle #9Preliminary anti-action

Solution Approach 2:

The patent uses an intermediary approach by introducing a clamp circuit as a mediator between the read voltage generation circuit and the memory cell array. This intermediary component selectively limits voltage amplification only in unselected cell strings while allowing full voltage swing in selected cells, thereby enabling data reading functionality while preventing harmful boosting voltages from damaging unselected memory cells.

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enhances the reliability of nonvolatile memory devices by preventing hot electron injection and Fowler-Nordheim tunneling, ensuring the integrity of data stored in memory cells.

Implementation Method 1

applying a string line select voltage to a selected SSL for selected cell strings to turn on the SSTs of the selected cell strings, applying a ground line select voltage to a selected GSL for selected cell strings to turn on the GSTs of the selected cell strings

Methodology Applied
Scientific EffectElectrical conduction: Conduction (electrical)

Implementation Method 2

preventing hot electron injection and Fowler-Nordheim tunneling

Methodology Applied
Scientific EffectHot electron injection:

Implementation Method 3

preventing hot electron injection and Fowler-Nordheim tunneling

Methodology Applied
Scientific EffectFowler-Nordheim tunneling:

Data Source

PatentUS10121542B2Nonvolatile memory device, storage device including nonvolatile memory device and reading method of nonvolatile memory device
Publication Date: 2018.11.06 SAMSUNG ELECTRONICS CO LTD
  • US10121542B2 patent drawing
  • US10121542B2 patent drawing
  • US10121542B2 patent drawing

AI summary

A nonvolatile memory device includes a memory cell array and a row decoder circuit. The row decoder circuit turns on memory cells of a plurality of cell strings of a selected memory block after applying a first prepulse to a first dummy word line connected to first dummy memory cells after applying a second prepulse to a second dummy word line connected to second dummy memory cells.