Non-Volatile Memory Read Method Using Localized Pass Voltages
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Solution Overview
Problem
Conventional non-volatile memory devices with shared control gates face issues during read operations due to program voltage interference, causing program disturbances and abnormal read characteristics due to adjacent memory cell influences.
Innovation Solution
A reading method for non-volatile memory devices with a structure where adjacent memory cells share a control gate, involving the application of a read voltage to the selected memory cell's control gates, a second pass voltage to alternate control gates, and a first pass voltage lower than the second pass voltage to further alternate control gates, to minimize interference and maintain uniform voltage levels across unselected memory cells.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a program voltage is applied to the control gates of a selected memory cell to perform a program operation, then the selected memory cell is programmed, but adjacent unselected memory cells are also affected and may be programmed (program disturbance)
Solution Approach 1:
The patent applies different voltage levels to different control gates based on their position relative to the selected memory cell. Specifically, a first pass voltage is applied to first control gates, a second pass voltage (higher than the first) is applied to second control gates adjacent to the selected cell, and a third pass voltage is applied to third control gates. This localized voltage differentiation ensures that the program voltage affects only the selected memory cell while preventing program disturbance in adjacent cells.
2Measurement precision
If a read voltage is applied to the control gates of a selected memory cell to perform a read operation, then the selected memory cell is read, but adjacent unselected memory cells may still be affected due to shared control gate structure
Solution Approach 1:
During read operations, the patent applies different pass voltages to different control gates to minimize interference from adjacent cells. A first pass voltage is applied to first control gates, a second pass voltage (higher than the first) is applied to second control gates adjacent to the selected memory cell, and a third pass voltage is applied to third control gates. This localized voltage application ensures accurate reading of the selected cell while preventing adjacent cell interference.
Solution Approach 2:
The patent applies higher pass voltages to control gates adjacent to the selected memory cell before and during the read operation to preemptively counteract any potential interference. By applying a second pass voltage (higher than the first pass voltage) to the second control gates that are adjacent to the selected memory cell, the method prevents adjacent cells from being inadvertently affected during the read operation.
Data Source
AI summary
A reading method of a non-volatile memory device that includes a plurality memory cells that each include one floating gate and two control gates disposed adjacent to the floating gate on two alternate sides of the floating gate, respectively, and two adjacent memory cells share one control gate, the reading method comprising applying a read voltage to control gates of a selected memory cell, applying a second pass voltage to alternate control gates of the memory cells different from the control gates of the selected memory cells starting from the control gates next to the selected memory cell, and applying a first pass voltage that is lower than the second pass voltage to alternate the control gates of the memory cells different from the control gates of the selected memory cells starting from the control gates secondly next to the selected memory cell.