Nonvolatile Memory Scheduling With Read-Priority Suspension
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Solution Overview
Problem
Existing memory systems face challenges in efficiently managing access to nonvolatile memories, particularly in balancing the execution of read, erase, and program commands to optimize performance and reduce latency variations.
Innovation Solution
A memory system controller employs a scheduling algorithm that prioritizes commands based on cumulative weights, suspending longer operations like erase/program commands to execute read commands when certain conditions are met, thereby optimizing command execution and reducing latency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of time
If the controller executes erase/program commands in FIFO order without suspension, then command execution simplicity is maintained, but read latency increases due to longer operation blocking
Solution Approach 1:
The controller dynamically adjusts command execution priority based on operation type and queue depth. Read commands can be suspended or prioritized over erase/program commands when certain conditions are met (e.g., read queue depth exceeds erase/program queue depth), making the scheduling system adaptive rather than static. This resolves the contradiction by introducing dynamic decision-making that reduces read latency without requiring complete restructuring of the command execution framework.
Solution Approach 2:
The controller periodically evaluates queue depths and command types to decide whether to suspend erase/program operations for read operations. This periodic assessment allows the system to balance between maintaining simple FIFO execution and reducing read latency, applying complexity only when necessary based on current queue conditions rather than continuously.
2Productivity
If the controller prioritizes read commands over erase/program commands, then read access efficiency improves, but erase/program command execution delay increases
Solution Approach 1:
The controller changes the execution parameter (priority level) of commands based on queue depth thresholds. When read queue depth exceeds erase/program queue depth by a certain threshold, read commands are granted higher priority. This parameter-based approach allows flexible adjustment of execution priority without hardcoding specific command types, resolving the contradiction by making priority dynamic and condition-based rather than fixed.
Solution Approach 2:
The controller continuously monitors queue depths of read and erase/program commands and uses this feedback to adjust execution priority. When the read queue becomes deeper than the erase/program queue, the system feedback mechanism triggers prioritization of read commands. This feedback loop ensures that priority assignment is responsive to actual system state, improving read efficiency while minimizing unnecessary delays to erase/program operations.
3Device complexity
If the controller uses a simple FIFO scheduling algorithm, then implementation complexity is reduced, but command execution fairness and latency balancing deteriorates
Solution Approach 1:
The controller segments the command queue into separate queues for read commands and erase/program commands, allowing independent management and priority assignment. This segmentation enables the system to apply different scheduling policies to different command types without requiring a completely complex unified scheduling algorithm, thus improving latency balancing while controlling implementation complexity.
Solution Approach 2:
The controller introduces an intermediary scheduling mechanism that sits between the simple FIFO structure and the final command execution. This intermediary layer evaluates queue depths and command types to make priority decisions, adding fairness and latency balancing capabilities without requiring complete redesign of the underlying FIFO execution framework, thus maintaining reasonable implementation complexity.
Data Source
AI summary
According to one embodiment, when a command executed in a nonvolatile memory is an erase/program command and when a cumulative weight value satisfies a condition that a first input is selected as an input of high priority, a memory system suspends execution of the erase/program command by transmitting a suspend command to the nonvolatile memory. The memory system repeats executing an operation of starting the execution of one read command of the first input and an operation of updating the cumulative weight by using the weight associated with the read command until read command no longer exists in the first input or until the condition that the cumulative weight is larger than the first value is not satisfied, and resumes the execution of the suspended erase/program command.