Nonvolatile Memory Read Voltage Optimization

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Solution Overview

Problem

The reliability of nonvolatile memory devices is compromised due to variations in their characteristics over time and use environments, leading to potential data loss and reduced performance.

Innovation Solution

A nonvolatile memory device is designed with multiple memory groups, each with distinct word lines, where processing circuitry applies specific read voltages based on threshold voltage distributions to ensure accurate data retrieval and prevent excessive erase operations, thereby enhancing reliability and reducing power consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a single read voltage is applied to all memory groups, then the device complexity is reduced, but the reliability deteriorates due to threshold voltage variations across different memory groups

Engineering Contradiction:
Improvedata integrityVSAvoidvoltage control complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The memory device is divided into multiple memory groups (first memory group, second memory group, etc.), each with its own word lines. The processing circuitry is segmented to independently determine and apply read voltages to each memory group based on their respective threshold voltage distributions, allowing customized voltage application that improves reliability while managing complexity through modular organization.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Each memory group is assigned a specific read voltage tailored to its local threshold voltage distribution characteristics. The processing circuitry determines a first read voltage for the first memory group and a second read voltage for the second memory group, ensuring that each group receives the optimal voltage for its specific conditions, thereby improving overall reliability through localized optimization.

Inventive Principle:
Principle #3Local quality

2Reliability

If erase operations are performed frequently to maintain data integrity, then the reliability is improved, but the power consumption increases

Engineering Contradiction:
Improvedata integrityVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The processing circuitry performs preliminary sensing operations by applying sub-voltages to word lines to determine the threshold voltage distribution of memory cells before performing erase operations. This preliminary action allows the system to identify when erase operations are actually needed, preventing unnecessary erases and reducing power consumption while maintaining data integrity.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The processing circuitry uses feedback from sensing operations to determine when erase operations should be performed. By continuously monitoring threshold voltage distributions through sub-voltage sensing and comparing against acceptable ranges, the system only triggers erase operations when necessary, optimizing the balance between reliability and power consumption.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS11443817B2Nonvolatile memory device
Publication Date: 2022.09.13 SAMSUNG ELECTRONICS CO LTD
  • US11443817B2 patent drawing
  • US11443817B2 patent drawing
  • US11443817B2 patent drawing

AI summary

A nonvolatile memory device includes processing circuitry configured to apply a sub-voltage to the first word lines, determine a desired first read voltage based on a threshold voltage distribution of a plurality of first memory cells connected to the first word lines, apply the sub-voltage to the second word lines, determine a desired second read voltage based on a threshold voltage distribution of a plurality of second memory cells connected to the second word lines, apply the desired first read voltage to the first word lines while simultaneously reading the first memory cells connected to the first word lines, and apply the desired second read voltage different from the desired first read voltage to the second word lines while simultaneously reading the second memory cells connected to the second word lines.