Nonvolatile Memory Redundancy and Flag Cell Integration
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Solution Overview
Problem
Nonvolatile memory apparatuses face defects during fabrication, leading to operational issues when defects occur in memory cells, and existing solutions do not effectively manage redundancy and flag cells to improve yield.
Innovation Solution
A nonvolatile memory apparatus is designed with a redundancy/flag cell area that includes flag cells for indicating programmed most significant bits, a content-addressed memory unit to manage the redundancy and flag cell areas, and CAM logic to control access, enhancing the apparatus's yield by allowing selective control and substitution of failed memory cells.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If redundancy memory cells are added to replace failed memory cells, then reliability is improved, but device complexity increases
Solution Approach 1:
The patent combines the flag cell area and redundancy cell area into a single redundancy/flag cell area, sharing common bit lines and control circuits. This merging approach provides both flag storage and redundancy replacement functions while reducing overall device complexity compared to completely separate implementations.
Solution Approach 2:
The redundancy/flag cell area serves multiple functions: storing flag information about most significant bits and providing replacement memory cells for failed cells. The content addressed memory unit also manages both flag and redundancy operations, creating a multi-functional system that improves reliability without proportionally increasing complexity.
2Manufacturing precision
If flag cells are configured in the redundancy cell area, then manufacturing precision is improved through better defect management, but device complexity increases
Solution Approach 1:
The memory cell array is segmented into a main memory cell area and a redundancy/flag cell area, with the latter containing both flag cells and redundancy cells. This segmentation allows precise management of defects by separating functional regions while maintaining organized control through the content addressed memory unit.
Solution Approach 2:
The content addressed memory unit acts as an intermediary that manages both flag cells and redundancy cells, storing address information and controlling access to both cell types. This intermediary structure enables precise defect management without requiring complex direct control circuits for each cell type.
3Reliability
If a content addressed memory unit is added to manage redundancy and flag cell areas, then reliability is improved through better cell substitution, but device complexity increases
Solution Approach 1:
The content addressed memory unit automatically manages the substitution of failed memory cells by storing address information and enabling self-directed replacement operations. The system uses the flag information and address storage to autonomously identify and replace failed cells, improving reliability while keeping control logic integrated rather than externally complex.
Data Source
AI summary
A nonvolatile memory apparatus includes a memory cell area including memory cells for storing data input from an external apparatus, a redundancy cell area including memory cells configured to substitute failed memory cells, and a flag cell area including memory cells for storing whether most significant bits of the memory cells have been programmed. The flag cell area is configured in a part of the redundancy cell area.