Non-Volatile Memory Refresh Timing for Data Retention

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Solution Overview

Problem

Non-volatile memory systems face issues with data retention due to shifting threshold voltages of memory cells over time, especially at higher temperatures and after repeated program-erase cycles, leading to potential data errors during read operations.

Innovation Solution

A memory system that includes a controller to manage a forced refresh operation by transferring data from one memory block to another based on elapsed time, temperature, and program-erase cycles, and adjusts read voltages and error correction methods based on these factors to maintain data integrity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If data is stored in non-volatile memory for long periods, then data retention is required, but threshold voltage shifts cause data errors

Engineering Contradiction:
Improvedata retentionVSAvoiddata errors
Core Design Contradiction:
ReliabilityVSLoss of information

Solution Approach 1:

The system performs forced refresh operations before data errors occur by calculating the time since the last program operation and comparing it with a reference time. This preliminary action transfers data from first memory cell units to second memory cell units before threshold voltage shifts cause data loss, thereby maintaining data retention reliability.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system continuously monitors the elapsed time since the last program operation and uses this feedback to determine when forced refresh operations are needed. The controller calculates the time difference between current time and last program time, compares it with reference time, and triggers refresh operations accordingly, creating a closed-loop feedback mechanism for data integrity.

Inventive Principle:
Principle #23Feedback

2Reliability

If forced refresh operations are performed frequently, then data integrity is maintained, but system productivity decreases

Engineering Contradiction:
Improvedata integrityVSAvoidsystem throughput
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The system dynamically adjusts the frequency of forced refresh operations based on actual usage patterns. Instead of performing periodic refreshes at fixed intervals, the controller calculates refresh timing based on the actual elapsed time since the last program operation, adapting the refresh frequency to match real data retention needs and minimizing unnecessary operations.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system changes the timing parameter of refresh operations from fixed periodic intervals to variable intervals based on program operation history. By calculating the reference time as the sum of elapsed time and threshold time, and comparing current time against this dynamic reference, the system optimizes refresh frequency to maintain data integrity while reducing unnecessary refresh operations.

Inventive Principle:
Principle #35Parameter changes

3Measurement precision

If read voltage is increased to improve read accuracy, then data retrieval precision improves, but memory cell stress increases

Engineering Contradiction:
Improveread accuracyVSAvoidmemory cell durability
Core Design Contradiction:
Measurement precisionVSStrength

Solution Approach 1:

The system performs forced refresh operations that transfer data from first memory cell units to second memory cell units before read operations. This preliminary action ensures data is freshly programmed with correct threshold voltages, eliminating the need to increase read voltage for accurate detection and thereby protecting memory cell durability.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

Instead of using high read voltages to overcome data degradation, the system converts the potential harm of data loss into a benefit by implementing forced refresh operations. The refresh operations proactively prevent data degradation, turning the problem of voltage shifts into an opportunity to maintain optimal read conditions without increasing stress on memory cells.

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

Data Source

PatentUS20250284420A1Memory system that controls timing of refresh operation
Publication Date: 2025.09.11 KIOXIA CORP
  • US20250284420A1 patent drawing
  • US20250284420A1 patent drawing
  • US20250284420A1 patent drawing

AI summary

A memory system controls timing of a refresh operation. The memory system includes a non-volatile memory including first and second memory cell units and a controller connectable to a host. The controller stores an execution time of write and erase operations with respect to the first memory cell unit, receives from the host power-on time information indicating a power-on time of the memory system when the memory system is powered on, determines a first time period from a last write or erase operation with respect to the first memory cell unit based on the stored execution time and the power-on time, determines an execution time of the refresh operation of transferring data stored in the first memory cell unit to the second memory cell unit based on the first time period, and starts the refresh operation at the determined execution time.