Non-Volatile Memory Reset Logic for Prolonged Busy States
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Solution Overview
Problem
Non-volatile memory devices often enter a busy state due to ongoing operations or defects, making it difficult to determine device defects during testing and affecting normal operation, as existing technologies struggle to detect and escape the busy state effectively.
Innovation Solution
The non-volatile memory device includes a control logic circuit that performs a reset operation when a busy state persists beyond a threshold time interval, using an on-chip recovery circuit to resolve the busy state without external controller intervention, ensuring a consistent response time and enabling defect analysis during device testing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the non-volatile memory device continuously maintains the busy state due to ongoing operations or defects, then the data storage and operation availability are preserved, but the device becomes unresponsive to new operations and defect detection becomes difficult
Solution Approach 1:
The control logic circuit performs a state check operation before executing the main memory operation to preliminarily detect whether the device is in a busy state. This preliminary detection enables the system to identify and handle busy states before they prevent defect detection or new operations, resolving the contradiction by proactively managing the busy state condition.
2Reliability
If the memory device performs extensive operations to ensure data integrity and completion, then the data reliability is improved, but the time required to complete operations increases and the device remains in busy state longer
Solution Approach 1:
The control logic circuit continuously monitors the operation status through state check operations and uses this feedback to determine when the busy state should end. When the feedback indicates that the busy state has persisted beyond a threshold or that no operation is actively being performed, the system transitions to a ready state, thus maintaining data integrity while preventing excessive busy state duration.
3Measurement precision
If the storage controller continuously polls the memory device to check operation status, then the operation status monitoring is improved, but the system complexity and firmware design burden increase
Solution Approach 1:
The non-volatile memory device autonomously performs state check operations and determines its own operation status without requiring continuous external polling. The control logic circuit internally monitors whether operations are being performed and automatically transitions between busy and ready states, enabling the device to self-report its status and reducing the firmware's monitoring burden while maintaining precise status knowledge.
Data Source
AI summary
A method of operating a non-volatile memory device includes receiving a first command signal for a state check operation from the storage controller, determining whether the non-volatile memory device is in a busy state based on the first command signal, determining whether a busy time interval during which the busy state is continuously maintained exceeds a threshold time interval in response to determining that the non-volatile memory device is in the busy state, performing a reset operation of the non-volatile memory device in response to determining that the busy time interval exceeds the threshold time interval, and providing a fail response signal to the storage controller in response to determining that the busy time interval exceeds the threshold time interval.