Nonvolatile Memory Device Using Sacrificial Layer for Adhesiveness

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Solution Overview

Problem

Current nonvolatile memory devices, particularly ReRAM with a three-dimensional cross-point structure, face challenges in increasing integration density while maintaining reliable electrical characteristics and adhesiveness between nanomaterial assembly and electrode layers, leading to variations in memory cell performance.

Innovation Solution

The implementation of a method involving a nanomaterial assembly layer with carbon nanotubes (CNTs) buried in the upper electrode layer, using a sacrificial material to form a sacrificial layer and a reinforcing layer, which enhances adhesiveness and allows for precise control of the nanomaterial assembly layer's thickness and uniformity, thereby improving the reliability and integration density of memory cells.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If a three-dimensional cross-point structure is used to increase integration density, then the number of memory cells per unit area increases, but variations in memory cell characteristics increase and adhesiveness between nanomaterial assembly and electrode layers deteriorates

Engineering Contradiction:
Improveintegration densityVSAvoidmemory cell characteristic uniformity
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

A sacrificial layer is formed in advance at the interface between the nanomaterial assembly layer and the upper electrode layer before depositing the electrode material. This preliminary action ensures uniform thickness and good adhesiveness of the nanomaterial assembly layer, thereby reducing variations in memory cell characteristics while maintaining high integration density in the three-dimensional cross-point structure.

Inventive Principle:
Principle #10Preliminary action

2Length of moving object

If the nanomaterial assembly layer thickness is reduced to miniaturize memory cells, then integration density increases, but the adhesiveness between nanomaterial assembly and electrode layers deteriorates

Engineering Contradiction:
Improvememory cell sizeVSAvoidadhesiveness
Core Design Contradiction:
Length of moving objectVSStrength

Solution Approach 1:

A sacrificial layer is introduced as an intermediary between the nanomaterial assembly layer and the upper electrode layer. This sacrificial layer acts as a mediator that enhances the adhesiveness between the nanomaterial assembly and the electrode layer, even when the nanomaterial assembly layer thickness is reduced for miniaturization purposes.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The sacrificial layer is formed in advance before depositing the upper electrode layer. This preliminary formation ensures that even thin nanomaterial assembly layers achieve good adhesiveness to the electrode layer, enabling memory cell miniaturization without sacrificing bonding strength.

Inventive Principle:
Principle #10Preliminary action

3Ease of manufacture

If conventional manufacturing methods are used without a sacrificial layer, then the manufacturing process is simpler, but the thickness control and uniformity of the nanomaterial assembly layer deteriorate

Engineering Contradiction:
Improvemanufacturing process complexityVSAvoidnanomaterial assembly layer thickness uniformity
Core Design Contradiction:
Ease of manufactureVSManufacturing precision

Solution Approach 1:

A sacrificial layer is introduced as a temporary intermediary structure during manufacturing. This layer provides a foundation that enables precise thickness control and uniformity of the nanomaterial assembly layer. After serving its purpose, the sacrificial layer is removed, leaving a precisely controlled nanomaterial assembly layer with improved manufacturing precision.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS8716691B2Nonvolatile memory device and method for manufacturing the same
Publication Date: 2014.05.06 KIOXIA CORP
  • US8716691B2 patent drawing
  • US8716691B2 patent drawing
  • US8716691B2 patent drawing

AI summary

According to one embodiment, a nonvolatile memory device includes a lower electrode layer, a nanomaterial assembly layer, and an upper electrode layer. The nanomaterial assembly layer is provided on the lower electrode layer and includes a plurality of micro conductive bodies assembled via a gap. The upper electrode layer is provided on the nanomaterial assembly layer. The portion of the micro conductive bodies is buried at least in a lower part of the upper electrode layer.