Nonvolatile Memory Shared Read Write Driver Circuit
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Solution Overview
Problem
Existing nonvolatile memory apparatuses face challenges with high current consumption and data alteration during read and write operations due to the use of current mirrors and high voltages, which can lead to incorrect data storage.
Innovation Solution
A nonvolatile memory apparatus that integrates a read/write control unit to supply a bias voltage with a constant level, a voltage generation unit to maintain the voltage level, and a memory cell that receives this constant voltage to sense and store data, reducing current consumption and improving data integrity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If current mirror structures are used to generate read current and write current, then the current driving ability is improved, but the current consumption increases and the current driving ability changes depending on position
Solution Approach 1:
The patent merges the read sense amplifier and write driver into a single integrated circuit block, sharing common current paths and control logic. This integration eliminates redundant current mirror structures, reducing overall current consumption while maintaining adequate current driving ability for both read and write operations.
Solution Approach 2:
The integrated read/write driver performs multiple functions (read current generation, write current generation, and sensing) within a single circuit structure. By making the driver universal, the patent eliminates the need for separate current mirror structures for read and write operations, thereby reducing current consumption while preserving functional capabilities.
2Power
If current mirror structures are used to generate read current and write current, then the current driving ability is improved, but the disposition of read sense amplifier and write driver is limited
Solution Approach 1:
By combining the read sense amplifier and write driver into one integrated unit with shared current paths, the patent creates a compact structure that can be flexibly positioned within the memory array. This merged structure eliminates the spatial constraints imposed by separate current mirror structures, enabling greater disposition flexibility.
3Productivity
If peak current according to switching is generated during read operation, then the read current is supplied, but data stored in memory cell can be altered and possibility of storing incorrect data increases
Solution Approach 1:
The patent employs controlled periodic switching with regulated current profiles during read operations. By using gradual current transitions rather than abrupt peak currents, the sensing operation is completed reliably without generating excessive electromagnetic interference that could alter stored data, thus maintaining both read speed and data integrity.
Solution Approach 2:
The integrated read/write driver incorporates protective circuitry that detects and limits current peaks before they can cause data alteration. This beforehand cushioning mechanism prevents harmful current spikes during switching transitions, ensuring data integrity while maintaining read operation efficiency.
4Power
If first high voltage and second high voltage are used to generate read current and write current, then the required current levels are achieved, but the amount of electric current necessary to generate high voltages increases
Solution Approach 1:
The patent integrates voltage generation and current regulation functions within the unified read/write driver. By sharing voltage regulation circuits and current paths between read and write operations, the patent reduces the total current required to generate and maintain high voltage levels, eliminating redundant voltage generation overhead.
Data Source
AI summary
A nonvolatile memory apparatus includes a read/write control unit and a voltage generation unit and the memory cell. The read/write control circuit is configured to supply a bias voltage in response to a read control signal, a write control signal and data. The voltage generation unit is configured to compare a level of the bias voltage with a voltage level of a sensing node and drive the sensing node at voltage having a constant level based on a result of the comparison. The memory cell coupled with the sensing node and configured to receive the voltage having the constant level.


