Non-volatile Memory Device with Metal Silicide Layer
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Multi-layered non-volatile memory devices face challenges in connecting and selecting memory cells across layers, leading to increased manufacturing complexity and costs due to the need for more processing steps.
Innovation Solution
A non-volatile memory device design featuring a first electrode, a second electrode crossing the first electrode, a data storing layer, and a metal silicide layer, with a junction layer optionally included, allowing for efficient stacking and reduced line resistance through the formation of schottky diodes or PN junctions, enabling high integration and simplified manufacturing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a multi-layered non-volatile memory device is used to increase integration degree, then memory capacity and operational speed are improved, but manufacturing complexity and costs increase due to more processing steps
Solution Approach 1:
The patent merges the connection and selection functions into a unified cross-point architecture where first and second electrodes intersect to form memory cells at cross points. This integration eliminates the need for separate connection and selection mechanisms, reducing manufacturing complexity while maintaining high memory capacity through vertical stacking of multiple layers.
Solution Approach 2:
The patent transitions from planar to three-dimensional architecture by stacking multiple electrode layers vertically. First electrodes extend in a first direction while second electrodes extend in a second direction perpendicular to the first, creating cross points in three-dimensional space. This dimensional change enables high integration without proportionally increasing manufacturing process complexity.
2Productivity
If a multi-layered non-volatile memory device is used to increase integration degree, then memory capacity is improved, but ease of operation deteriorates due to difficulty in connecting and selecting memory cells across layers
Solution Approach 1:
The patent implements a universal cross-point structure where intersecting first and second electrodes serve dual functions: connection and selection. Memory cells formed at cross points can be accessed through simple row-column decoding, enabling easy connection and selection across multiple layers without complex control mechanisms.
Solution Approach 2:
The patent segments the memory device into multiple independent layers with first and second electrodes extending in perpendicular directions. Each cross point forms an addressable memory cell, allowing selective access to specific cells across layers through independent control of electrode lines, thereby simplifying connection and selection operations.
3Speed
If metal silicide layer is added to reduce line resistance, then operational speed is improved, but device complexity increases
Solution Approach 1:
The patent introduces a metal silicide layer as an intermediary material between conductive layers at cross points. This intermediate layer reduces contact resistance and line resistance, improving operational speed. The metal silicide forms naturally through thermal reaction, adding minimal process complexity while significantly enhancing electrical performance.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enables efficient stacking of memory cells with reduced line resistance and simplified manufacturing, enhancing the operational speed and integration of non-volatile memory devices while maintaining high data storage capabilities.
Implementation Method 1
the first semiconductor may contact the at least one metal silicide layer so as to form a schottky diode
Implementation Method 2
the at least one first electrode may comprise a first semiconductor having a first conductivity, and the at least one junction layer may comprise a second semiconductor having a second conductivity which is opposite to the first conductivity
Data Source
AI summary
Provided are a non-volatile memory device which can be extended in a stack structure and thus can be highly integrated, and a method of manufacturing the non-volatile memory device. The non-volatile memory device includes: at least one first electrode, at least one second electrode crossing the at least one first electrode, at least one data storing layer interposed between the at least one first electrode and the second electrode, at a region in which the at least one first electrode crosses the at least one second electrode and at least one metal silicide layer interposed between the at least one first electrode and the at least one second electrode, at the region in which the at least one first electrode crosses the at least one second electrode.


