Nonvolatile Memory Verification Using Single Voltage
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Solution Overview
Problem
Existing nonvolatile memory devices face inefficiencies in verifying program completion across memory cells with different target threshold voltage distributions, leading to prolonged verification times and reduced performance.
Innovation Solution
A program verification method that applies a single verification voltage to determine program completion for memory cells with varying target threshold voltage distributions, changing bit values in data latches based on verification pass counts to differentiate program states and inhibit programming for completed cells, thereby reducing the number of verification voltages needed.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If multiple verification voltages are applied to verify memory cells with different target threshold voltage distributions, then verification accuracy is improved, but verification time increases
Solution Approach 1:
The patent combines multiple verification operations into a single verification voltage application. By using a verification voltage distribution that spans multiple target threshold voltage distributions, the system verifies multiple program states simultaneously with one verification voltage application, rather than applying separate verification voltages for each state. This merging of verification operations reduces verification time while maintaining accuracy through the use of verification pass counts to differentiate between different program states.
Solution Approach 2:
The verification voltage serves multiple functions by being used to verify memory cells with different target threshold voltage distributions. A single verification voltage is designed to verify multiple program states (e.g., S1, S2, S3) simultaneously, making the verification process universal rather than state-specific. This multi-functionality is achieved by comparing the verification pass count against state-specific thresholds to determine program completion for different states using the same verification voltage.
2Measurement precision
If separate verification voltages are used for each program state, then program state differentiation accuracy is improved, but device complexity increases
Solution Approach 1:
The verification voltage generator creates a universal verification voltage that can verify multiple program states simultaneously. Instead of generating separate verification voltages for each program state, the system uses one verification voltage with a distribution that covers multiple target threshold voltage ranges. The differentiation of program states is achieved through software logic (verification pass count comparison) rather than hardware complexity in voltage generation.
Solution Approach 2:
The patent changes the parameter of verification pass count to differentiate between program states instead of using different verification voltages. By varying the verification pass count threshold for different program states, the system achieves state differentiation through parameter variation in the verification logic rather than through complex voltage generation, thereby reducing device complexity.
3Measurement precision
If verification is performed for each memory cell individually with multiple voltages, then verification precision is improved, but productivity decreases
Solution Approach 1:
The patent merges the verification of multiple program states into a single verification operation. By applying one verification voltage and using verification pass count comparison, the system verifies multiple program states (S1, S2, S3) simultaneously for each memory cell, rather than performing separate verification operations for each state. This merging increases programming throughput while maintaining verification precision through the pass count mechanism.
Data Source
AI summary
A program verification method is for a nonvolatile memory device which programs a plurality of memory cells. The program verification method includes applying a plurality of verification voltages, and determining whether programming of memory cells, having different target threshold voltage distributions, from among the plurality of memory cells is completed based on one of the plurality of verification voltages.