Nonvolatile Memory Smart Verification for Over-Programming
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Solution Overview
Problem
The reliability of nonvolatile memory, such as NAND flash memory, is reduced due to gate insulating film deterioration from repeated write and erase processes, leading to over-programming and increased variation in memory cell characteristics.
Innovation Solution
A smart verification function that alternately performs write and verification operations while adjusting the write start voltage based on monitored characteristics, and sets different maximum values for determining write process success depending on whether the change process is executable, to reduce stress on memory cells and prevent over-programming.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If repeated write and erase processes are performed on nonvolatile memory, then data storage capacity is maintained, but gate insulating film deteriorates and reliability is reduced
Solution Approach 1:
The patent applies dynamics by making the verification voltage dynamic rather than fixed. The verification voltage is adjusted based on the number of programming attempts, increasing progressively until a threshold is reached. This dynamic adjustment allows the system to adapt to gate insulating film deterioration over time, maintaining reliability while accounting for the finite lifespan of the insulating film through repeated operations.
Solution Approach 2:
The patent changes the verification voltage parameter based on the programming attempt count. Instead of using a constant verification voltage, the system modifies this parameter dynamically during the programming process. When the verification fails, the voltage is increased for subsequent attempts, which helps prevent over-programming and reduces stress on the gate insulating film, thereby extending its effective lifespan.
2Reliability
If verification voltage is increased to ensure data writing, then write reliability is improved, but memory cell stress increases and over-programming occurs
Solution Approach 1:
The verification voltage transitions from a static value to a dynamic value that changes based on programming attempt count. This dynamic approach ensures that voltage is only increased when necessary (after verification failures), thereby maintaining write reliability while minimizing unnecessary stress accumulation on memory cells.
Solution Approach 2:
The patent implements periodic verification attempts with increasing voltage levels. Instead of continuously applying high voltage, the system performs periodic verification checks and only increases voltage when verification fails. This periodic action pattern reduces cumulative stress on memory cells while ensuring data is properly written, preventing over-programming.
3Device complexity
If fixed maximum verification loop count is used, then process control is simplified, but valid memory cells are misidentified as defective due to gate insulating film deterioration
Solution Approach 1:
The maximum verification loop count changes from a fixed value to a dynamic value based on gate insulating film deterioration indicators. The system monitors programming characteristics and adjusts the maximum loop count accordingly, allowing more verification attempts when deterioration is detected. This dynamic adjustment prevents misidentification of valid cells as defective while maintaining reasonable control complexity through automated adaptation.
Solution Approach 2:
The patent incorporates feedback mechanisms that monitor programming success rates and verification outcomes. Based on this feedback, the system dynamically adjusts the maximum verification loop count. When programming becomes more difficult due to gate insulating film deterioration, the feedback loop increases the allowed verification attempts, preventing valid memory cells from being incorrectly marked as defective.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach improves the reliability of nonvolatile memory by reducing the stress on memory cells, preventing over-programming, and increasing the number of valid memory cells by adjusting the write voltage and loop counts based on the deterioration state of the memory cells.
Implementation Method 1
A data write process and a data erasing process for a nonvolatile memory, such as a NAND flash memory, apply a high voltage between a substrate and a control gate to charge or discharge electrons into and from a charge storage layer
Data Source
AI summary
According to one embodiment, in a nonvolatile memory, the determination unit determines whether a change process is executable or not. The change process is a process based on characteristics of the memory cell array when a first write process is performed. The change process changes at least one of a value of a write start voltage and an increase amount in a write voltage in a second write process. The second write process is a process where a write operation of writing data to upper pages of at least part of the plurality of nonvolatile memory cells and a verification operation are alternately repeated. The setting unit sets a maximum value for determining whether the second write process succeeds or fails to a first value when the change process is executable, and sets the maximum value to a second value when the change process is not executable.