Non-Volatile Memory Soft Bit Read Schemes

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Solution Overview

Problem

Flash memory devices face challenges in accurately reading data due to increased interactions and perturbations between cells, especially with multi-level cell (MLC) storage, leading to higher bit error rates and limited retention time, as the threshold voltage distributions become narrower and more prone to errors.

Innovation Solution

The implementation of non-uniform soft bit read schemes with optimized placement of threshold levels across the threshold window, allowing for higher resolution in error correction and improved reliability by distributing reference thresholds more densely in error-prone regions, and using asymmetric soft read points around hard read points to enhance read speed and reduce energy consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If multi-level cell (MLC) storage is used to increase storage capacity, then the number of bits stored per cell increases, but the threshold voltage distributions become narrower and more prone to errors, leading to higher bit error rates

Engineering Contradiction:
Improvestorage capacityVSAvoidbit error rate
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The patent segments the threshold window into multiple voltage bands with non-uniform spacing. By dividing the threshold window into 2m voltage bands using 2m-1 demarcation reference threshold voltages, the system can resolve m bits of data per cell. The segmentation allows different regions of the threshold window to be optimized independently, with closer spacing in regions where distributions overlap more, thereby reducing bit error rates while maintaining high storage capacity.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent applies local quality by using non-uniform spacing of reference threshold voltages across the threshold window. Rather than uniform spacing, the reference thresholds are positioned closer together in regions where voltage distributions overlap more significantly and farther apart in regions with less overlap. This local optimization reduces bit error rates in critical regions while maintaining overall storage efficiency.

Inventive Principle:
Principle #3Local quality

2Quantity of substance

If the threshold window is partitioned into more voltage bands to store more bits per cell, then storage density increases, but the margin between bands decreases, making readings more error-prone

Engineering Contradiction:
Improvebits per cellVSAvoidread accuracy
Core Design Contradiction:
Quantity of substanceVSMeasurement precision

Solution Approach 1:

The patent implements local quality by positioning reference threshold voltages non-uniformly across the threshold window. The spacing between adjacent reference thresholds is adjusted based on the local characteristics of voltage distributions in different regions. In regions where distributions are closer together, reference thresholds are placed closer to maximize the use of available voltage range. In regions with greater separation, thresholds are placed farther apart, providing larger margins and improved read accuracy. This local optimization allows the system to achieve high bits-per-cell storage while maintaining robust read accuracy.

Inventive Principle:
Principle #3Local quality

3Reliability

If additional reference thresholds are added to improve reading accuracy, then bit error rate decreases, but the complexity of read circuits increases

Engineering Contradiction:
Improvereading accuracyVSAvoidread circuit complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent changes the parameter of reference threshold spacing from uniform to non-uniform. By adjusting the spacing parameter dynamically across different regions of the threshold window, the system achieves higher reading accuracy in critical regions without uniformly increasing the number of reference thresholds across the entire window. This parameter change allows optimization of reading accuracy where needed while limiting circuit complexity in regions where it is less critical.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS8099652B1Non-volatile memory and methods with reading soft bits in non uniform schemes
Publication Date: 2012.01.17 SANDISK TECHNOLOGIES LLC
  • US8099652B1 patent drawing
  • US8099652B1 patent drawing
  • US8099652B1 patent drawing

AI summary

A non-volatile memory has its cells' thresholds programmed within any one of a first set of voltage bands partitioned by a first set of reference thresholds across a threshold window. The cells are read at a higher resolution relative to a second set of reference thresholds so as to provide additional soft bits for error correction. The reference thresholds of the second set are set up to be non-uniformly distributed on the threshold window so as to provide higher resolution at designated regions. At the same time they are conducive to be read in groups for soft bits to be read bit-by-bit systematically with a simple algorithm and read circuit and using a minimum of data latches. This is accomplished by relaxing the requirement that the first set of reference threshold is a subset of the second set and that the resulting soft bits are symmetrically distributed about the hard bits.