Nonvolatile Memory Device Stacked Gate Electrodes Convex Portions
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Solution Overview
Problem
The integration density of two-dimensional or planar nonvolatile memory devices is limited by the area occupied by unit memory cells, leading to challenges in achieving superior performance and cost-effectiveness, while three-dimensional memory devices with vertically arranged cells offer improved density but require innovative designs to enhance product reliability.
Innovation Solution
A nonvolatile memory device design featuring a substrate with a cell array region and stacked gate electrodes, including convex portions that extend toward the substrate, and a word line cutting region to optimize channel structures and prevent electrode deterioration, thereby improving integration density and reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If two-dimensional or planar memory device design is used, then manufacturing simplicity is maintained, but integration density is limited
Solution Approach 1:
The patent transitions from two-dimensional planar memory cells to three-dimensional vertically stacked gate electrodes. Multiple gate electrodes are stacked in the vertical direction (second direction perpendicular to the first direction), enabling higher integration density by utilizing the third dimension for memory cell arrangement while maintaining manufacturability through systematic stacking processes.
2Quantity of substance
If gate electrodes are stacked vertically to increase density, then integration density improves, but electrode deterioration occurs
Solution Approach 1:
The patent introduces convex portions on gate electrodes that create localized structural variations. These convex portions have outward curves extending toward the substrate, providing enhanced mechanical support and stress distribution at critical locations. The word line cutting region is specifically designed to address local stress concentration points, preventing electrode deterioration while maintaining the overall vertical stacking structure for high density.
3Quantity of substance
If channel structures are closely spaced to increase density, then integration density improves, but manufacturing precision requirements increase
Solution Approach 1:
The patent employs convex portions with outward curves on the gate electrodes. These curved structures provide gradual transitions and reduced stress concentration compared to sharp corners, facilitating more tolerant manufacturing processes. The curved geometry allows for better alignment and spacing control of closely spaced channel structures while maintaining structural integrity during fabrication.
Data Source
AI summary
A nonvolatile memory device includes a substrate including a cell array region, a first gate electrode including an opening on the cell array region of the substrate, a plurality of second gate electrodes stacked above the first gate electrode and including convex portions having an outward curve extending toward the substrate, and a word line cutting region cutting the opening and the convex portions.