Nonvolatile Memory Device With Stacked Gate Layers

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Solution Overview

Problem

Current nonvolatile memory devices face challenges in achieving higher integration and reduced costs, particularly in the manufacturing process of three-dimensional memory devices with multiple stacked gate layers and interlayer insulating layers.

Innovation Solution

The proposed nonvolatile memory device incorporates a substrate with alternately stacked gate layers and interlayer insulating layers, featuring a channel structure and filling structures that extend through the stacked structures, with specific dimensions and configurations to optimize integration and manufacturing efficiency, including a simplified etching process for forming word line cuts and channel holes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If the number of gate layers is increased to improve integration density, then the integration density improves, but the manufacturing process complexity and cost increase

Engineering Contradiction:
Improveintegration densityVSAvoidmanufacturing process complexity
Core Design Contradiction:
Quantity of substanceVSDevice complexity

Solution Approach 1:

The stacked structure is divided into multiple gate layers (first gate layers and second gate layers) separated by interlayer insulating layers. This segmentation allows for modular manufacturing where each layer can be processed independently or in groups, reducing overall process complexity while maintaining high integration density.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Multiple gate layers are combined into a single stacked structure that can be etched and processed simultaneously. The first and second gate layers are stacked alternately with interlayer insulating layers, enabling simultaneous etching of channel holes and word line cuts through the entire stack, thereby reducing manufacturing steps and cost.

Inventive Principle:
Principle #5Merging (Combining)

2Quantity of substance

If multiple gate layers are stacked to increase integration, then integration density improves, but manufacturing cost increases

Engineering Contradiction:
Improveintegration densityVSAvoidmanufacturing cost
Core Design Contradiction:
Quantity of substanceVSEase of manufacture

Solution Approach 1:

The etching process continuously removes material through the entire stacked structure in a single operation, forming channel holes and word line cuts simultaneously. This continuous action eliminates the need for multiple separate etching steps, reducing manufacturing time and cost while achieving high integration density.

Inventive Principle:
Principle #20Continuity of useful action

Solution Approach 2:

The stacked structure of gate layers and interlayer insulating layers serves multiple functions: it provides electrical isolation between gates, creates vertical channel paths, and enables simultaneous processing of multiple features. This multi-functionality reduces the number of manufacturing steps required.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Reliability

If channel structure diameter varies to optimize performance, then device performance improves, but manufacturing precision requirements increase

Engineering Contradiction:
Improvedevice performanceVSAvoidchannel structure dimension control
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The channel structure has different diameters at different locations: a first diameter in the first stacked structure and a second diameter in the second stacked structure. This local variation optimizes device performance for different functional regions while the tapered filling structure provides a transition zone that accommodates the dimensional change.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The filling structure with its tapered configuration acts as an intermediary between regions with different channel diameters. It provides a gradual transition that reduces stress concentration and facilitates manufacturing by allowing controlled diameter changes without abrupt transitions.

Inventive Principle:
Principle #24Intermediary (Mediator)

4Quantity of substance

If filling structure width varies to optimize integration, then integration density improves, but manufacturing precision requirements increase

Engineering Contradiction:
Improveintegration densityVSAvoidfilling structure dimension control
Core Design Contradiction:
Quantity of substanceVSManufacturing precision

Solution Approach 1:

The filling structure has an asymmetric tapered configuration where the width at the upper end differs from the width at the lower end. This asymmetric design optimizes space utilization and integration density while the gradual taper provides manufacturing tolerance that reduces precision requirements compared to abrupt dimensional changes.

Inventive Principle:
Principle #4Asymmetry

Data Source

PatentUS12178043B2Nonvolatile memory device
Publication Date: 2024.12.24 SAMSUNG ELECTRONICS CO LTD
  • US12178043B2 patent drawing
  • US12178043B2 patent drawing
  • US12178043B2 patent drawing

AI summary

A nonvolatile memory device may include a substrate; a first stacked structure on the substrate; a second stacked structure on the first stacked structure; a channel structure including a first portion passing through the first stacked structure and a second portion passing through the second stacked structure; and a filling structure including a first portion passing through the first stacked structure and extending in a first horizontal direction and a second portion passing through the second stacked structure and extending in the first horizontal direction. The upper end of the first portion of the filling structure may be at a same height as the upper end of the first portion of the channel structure.