Nonvolatile Memory With Stacked Insulating Films
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Miniaturization of nonvolatile semiconductor memory is hindered by the difficulty in thinning the block insulating film without discharging stored charges to the gate electrode, and existing technologies face challenges in realizing a multilevel configuration due to precise control requirements for particle diameter and variance in charge-storing particles.
Innovation Solution
A nonvolatile semiconductor memory structure is developed with a charge storage part between the channel region and the gate electrode, featuring conductive nanocrystal layers with different diameters to create energy barriers for high-speed writing and retention, allowing for thinner films and a multilevel configuration by using Si nanocrystals with controlled particle sizes and oxide films.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If the block insulating film is made thinner to enable miniaturization, then the memory cell size is reduced, but stored charges may be discharged to the gate electrode causing reliability degradation
Solution Approach 1:
The block insulating film is segmented into a stacked structure comprising a first insulating film and a second insulating film with different dielectric constants. The first insulating film (with higher dielectric constant) is positioned adjacent to the charge storage layer, while the second insulating film (with lower dielectric constant) is positioned away from it. This segmentation allows the film to provide both strong charge blocking capability near the storage layer and sufficient insulation overall, enabling thinner total thickness while maintaining reliability.
Solution Approach 2:
Different regions of the block insulating film are assigned different dielectric properties: the first insulating film has a higher dielectric constant (k1) to provide strong electric field screening near the charge storage layer where charge discharge risk is highest, while the second insulating film has a lower dielectric constant (k2) to provide adequate insulation. This local quality differentiation optimizes the balance between charge blocking and insulation for miniaturized structures.
2Device complexity
If particles are used to store charges directly, then the structure is simplified, but precise control of particle diameter and variance is required causing manufacturing difficulty
Solution Approach 1:
An intermediary charge storage layer is introduced between the semiconductor substrate and the block insulating film. This charge storage layer serves as a mediator that can store charges without requiring precise particle size control. The charge storage layer comprises a nitride film with trap levels that can capture and retain charges, eliminating the need for precisely controlled conductive particles while maintaining the simplified structure advantage.
3Quantity of substance
If a multilevel configuration is implemented to increase capacity, then the memory capacity is enhanced, but the structure becomes more complex and difficult to manufacture
Solution Approach 1:
The stacked block insulating film structure with different dielectric constant layers is designed to be universally applicable to both single-level and multilevel memory configurations. The charge storage layer with trap levels can store charges at multiple threshold voltage levels, enabling multilevel cells (MLC) functionality. This universal design allows the same basic structure to achieve increased capacity through multilevel operation without proportionally increasing structural complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enhances memory retention, enables low-voltage high-speed writing, and facilitates miniaturization while maintaining high reliability by utilizing Si nanocrystals with varying diameters to control energy barriers and current leakage.
Implementation Method 1
the tunnel of information charge is blocked by an energy barrier ΔE caused by quantum confinement and the Coulomb blockade effect of Si nanocrystals
Implementation Method 2
the tunnel of information charge is blocked by an energy barrier ΔE caused by quantum confinement and the Coulomb blockade effect of Si nanocrystals
Implementation Method 3
charges can go in and out in the form of tunnel current between the Si surface and the trap level in the Si nitride film (charge storage layer) via a double tunnel junction
Data Source
AI summary
According to one embodiment, a nonvolatile semiconductor memory including a first gate insulating film formed on a channel region of a semiconductor substrate, a first particle layer formed in the first gate insulating film, a charge storage part formed on the first gate insulating film, a second gate insulating film which is formed on the charge storage part, a second particle layer formed in the second gate insulating film, and a gate electrode formed on the second gate insulating film. The first particle layer includes first conductive particles that satisfy Coulomb blockade conditions. The second particle layer includes second conductive particles that satisfy Coulomb blockade conditions and differs from the first conductive particles in average particle diameter.