Nonvolatile Memory Staged Data Transmission for Programming Speed

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Solution Overview

Problem

Current semiconductor memory devices face challenges in achieving improved operating speed and efficiency, particularly in programming operations, due to limitations in data transmission and processing methodologies.

Innovation Solution

A nonvolatile memory device with a memory cell array, page buffer circuit, and row decoder, where data is sent in stages to initiate and continue program operations, allowing for simultaneous or shadowed data transmission to reduce programming time, and a controller manages these operations to optimize performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If data is transmitted sequentially to complete programming operations, then data integrity is maintained, but programming time increases

Engineering Contradiction:
Improvedata integrityVSAvoidprogramming time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The controller transmits first data to the nonvolatile memory device and initiates programming operations before transmitting second data. This preliminary action allows the programming operation to start early, and the continuous transmission of data during the programming operation shadows the programming time, thereby reducing total programming time while maintaining data integrity through staged transmission.

Inventive Principle:
Principle #10Preliminary action

2Device complexity

If programming operations are performed sequentially, then data processing is simple, but operating speed is reduced

Engineering Contradiction:
Improvedata transmission processVSAvoidoperating speed
Core Design Contradiction:
Device complexityVSSpeed

Solution Approach 1:

The controller continuously transmits data (first data, then second data) during the programming operation without idle waiting. The programming operation and data transmission occur in overlapping time periods, creating continuous useful action that improves operating speed while the controller manages the complexity through coordinated control of data transmission timing.

Inventive Principle:
Principle #20Continuity of useful action

3Ease of operation

If all data is transmitted before programming operation, then data preparation is complete, but time is wasted waiting for programming to start

Engineering Contradiction:
Improvedata preparationVSAvoidwaiting time
Core Design Contradiction:
Ease of operationVSLoss of time

Solution Approach 1:

The controller transmits first data and initiates programming operation as a preliminary action before transmitting second data. This eliminates waiting time by overlapping data transmission with programming operation execution, while the controller maintains ease of operation through systematic staged data transmission management.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS10346097B2Nonvolatile memory device and storage device including nonvolatile memory device
Publication Date: 2019.07.09 SAMSUNG ELECTRONICS CO LTD
  • US10346097B2 patent drawing
  • US10346097B2 patent drawing
  • US10346097B2 patent drawing

AI summary

A storage device includes a nonvolatile memory device and a controller configured to send first data, an address, and a first command to the nonvolatile memory device. The controller also sends at least one data to the nonvolatile memory device after sending the first command. The nonvolatile memory device is configured to initiate a program operation, which is based on the first data, in response to the first command. When receiving the at least one data from the controller, the nonvolatile memory device is configured to continue to perform the program operation based on the first data and the at least one data.