Nonvolatile Logic Memory State Preservation for Deep Low Power Modes
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Computing devices face challenges in using deep low power modes due to the need for manual reset of CPU and peripherals upon wake-up, which is cumbersome and power-intensive, limiting the availability of these modes for users.
Innovation Solution
A software routine is implemented to save and restore the CPU and peripheral states to non-volatile memory before entering and exiting deep low power mode, allowing for quick and power-efficient wake-up without a full reset.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If the device enters the lowest power mode by removing power from the CPU, then power consumption is reduced to the minimum level, but the CPU state is not retained and a full reset is required upon wakeup
Solution Approach 1:
The patent applies preliminary action by saving the CPU state to non-volatile memory before entering the deep low power mode. This pre-saved state allows the CPU to restore its operating state quickly upon wakeup without requiring a full reset sequence, thus reducing wakeup time while maintaining minimal power consumption during the low power mode.
2Use of energy by moving object
If the device enters the lowest power mode by removing power from the CPU, then power consumption is reduced to the minimum level, but the device complexity increases due to the need for manual reset handling
Solution Approach 1:
The patent applies self-service by implementing a software routine that automatically saves the CPU state before entering low power mode and automatically restores it upon wakeup. This eliminates the need for programmers to manually handle reset conditions and restore application state, thereby reducing device complexity and making the deep low power mode readily available for use without requiring application engineer assistance.
3Reliability
If a full reset is executed upon wakeup from deep low power mode, then the CPU state is restored, but the time and energy required for rebooting increase
Solution Approach 1:
The patent applies preliminary action by pre-saving the CPU state to non-volatile memory before entering the deep low power mode. Upon wakeup, the system restores this pre-saved state instead of executing a full reset sequence, thereby maintaining reliable CPU state restoration while significantly reducing the time and energy required for the reboot process.
4Loss of time
If the CPU state is saved to non-volatile memory before entering deep low power mode, then wakeup time is reduced, but power is consumed during the state storage process
Solution Approach 1:
The patent applies partial action by selectively saving only the critical CPU state information to non-volatile memory before entering deep low power mode, rather than performing a complete system state backup. This partial state storage approach reduces the power consumption and time required for the storage process while still enabling fast wakeup by restoring only the essential CPU state needed to resume operation.
Data Source
AI summary
A computing device apparatus facilitates use of a deep low power mode that includes powering off the device's CPU by including a software routine configured to be run by the CPU that effects saving to a non-volatile memory a state of the CPU and/or the device's peripherals before entering the deep low-power mode. The software routine can be configured to control this state storage in response to detecting a low power event, i.e., loss of power sufficient to run the CPU, or a software command to enter the deep low power mode to save power as part of an efficiency program. Then, upon wake up from the deep low power mode, the software routine is first run by the CPU to effect restoring from the non-volatile memory the state of the CPU and the peripherals before execution of a primary application for the central processing unit.