Multi-Cell Storage Grouping for Non-Volatile Memory Wear Reduction

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Solution Overview

Problem

The existing non-volatile memory storage devices, such as NAND flash memory, have limited lifetime due to the limited number of program/erase cycles, leading to unreliable data retention, and there is a need for improved techniques to store data efficiently while reducing wear on storage cells.

Innovation Solution

The method involves grouping storage cells into multi-cell storage cell groups to use fewer threshold voltage levels than available, allowing for increased capacity and extended lifetime by reducing the number of states and threshold voltages used, thereby minimizing wear on storage cells.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If multiple threshold voltage levels are used to increase storage capacity, then storage capacity is improved, but wear on storage cells increases reducing lifetime

Engineering Contradiction:
Improvestorage capacityVSAvoidstorage cell lifetime
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The storage cell is divided into multiple sub-cells (first sub-cell and second sub-cell), each capable of storing one bit. By segmenting the storage cell and using selective programming of sub-cells, the patent achieves multi-bit storage functionality while controlling wear on individual sub-cells, thus resolving the contradiction between storage capacity and storage cell lifetime

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent dynamically selects which sub-cells to program based on the data to be stored. Different programming patterns are applied to different sub-cells, allowing the system to adaptively manage wear across sub-cells while maintaining high storage capacity. This dynamic approach enables the storage device to optimize between capacity utilization and wear distribution

Inventive Principle:
Principle #15Dynamics

2Productivity

If more threshold voltage levels are programmed to represent more bits, then storage density is improved, but the number of program/erase cycles decreases

Engineering Contradiction:
Improvestorage densityVSAvoidprogram/erase cycle lifetime
Core Design Contradiction:
ProductivityVSDuration of action of stationary object

Solution Approach 1:

By segmenting the storage cell into multiple sub-cells and programming them selectively, the patent achieves high storage density equivalent to multi-threshold voltage programming without actually programming all sub-cells in every operation. This segmentation approach maintains high productivity while reducing the cumulative wear that would occur with full-programming methods

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent treats individual sub-cells as replaceable units that can be programmed independently. When certain sub-cells reach their wear limit, they can be erased and reused while others continue serving, effectively creating a pool of short-living components that collectively provide long-term high-density storage capability

Inventive Principle:
Principle #27Cheap short-living objects (Disposable)

Data Source

PatentUS10095424B2Apparatus and method for programming non-volatile memory using a multi-cell storage cell group
Publication Date: 2018.10.09 SK HYNIX NAND PRODUCT SOLUTIONS CORP
  • US10095424B2 patent drawing
  • US10095424B2 patent drawing
  • US10095424B2 patent drawing

AI summary

Provided are an apparatus, method, and system for programming a multi-cell storage cell group. A non-volatile memory has storage cells. Each storage cell is programmed with information using a plurality of threshold voltage levels and each storage cell is programmed from bits from a plurality of pages. A memory controller is configured to program the storage cells and to organize the storage cells in the non-volatile memory into storage cell groups. Each storage cell group stores a number of bits of information and each of the storage cells in each of the storage cell groups is programmed with the plurality of threshold voltage levels. The memory controller selects bits from the pages to write for one storage cell group and determines at least one threshold voltage level to use for each of the storage cells in the storage cell group to program the selected bits in the storage cell group.